Neither SMT nor THT is inherently easier to test in every way. Through-hole leads often leave solder joints visible on the board’s opposite side, while some surface-mount packages conceal their joints. But inspection visibility is only one part of board testing: probe access, the defect being sought, production requirements, and the applicable acceptance criteria all matter.
What SMT and THT mean for board testing
Surface-mount technology (SMT) places components on pads at the surface of a printed circuit board. Through-hole technology (THT), also called plated through-hole (PTH), uses leads that pass through holes in the board and are soldered to pads, commonly on the opposite side.
That geometry creates a useful starting point for inspection, not a universal verdict. Many THT joints can be viewed from the solder side. SMT joints may be visible around a component’s edges, partly obscured, or fully hidden beneath its package. The actual visibility depends on the package and board layout. NASA’s historical discussion of visual inspection for SMT describes how connections under devices can make direct visual inspection impractical.
Which defects can each inspection method find?
Choose a method by the feature or failure you need to evaluate. Seeing a solder joint, assessing its hidden structure, checking electrical connections, and confirming the board’s intended operation are different tasks.
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| Method | What it can help assess | Important limitation |
|---|---|---|
| Visual or manual inspection | Accessible features and gross defects, including visible component placement and soldering features. | It cannot reveal connections concealed by an opaque component package; qualitative visual review is not electrical proof. |
| Automated optical inspection (AOI) | Camera-visible assembly features, such as placement and visible solder features. | It cannot see through an opaque package or establish electrical behavior. |
| X-ray or automated X-ray inspection (AXI) | Internal solder structures that are hidden from view, particularly connections under area-array packages such as BGAs. | What can be assessed depends on package geometry, equipment, and inspection criteria. X-ray does not establish complete board quality by itself. |
| In-circuit test (ICT) | Electrical properties of components or connections under the test’s conditions. | It needs a suitable electrical access strategy; fine-pitch, high-density SMT and BGA layouts can constrain physical probe access. |
| Boundary scan | Some interconnects, using supported devices’ test logic and a test access port. | Coverage depends on device support and board design; it does not provide access to every net or replace all other checks. |
| Functional test | Whether the assembled board performs its intended behavior in a defined operating scenario. | Passing a functional scenario does not prove every solder joint’s workmanship or identify every component-level defect. |
AOI and X-ray answer different visual questions: AOI examines what a camera can see; X-ray can assess some structures hidden beneath packages. Neither should be treated as a substitute for electrical or functional testing. Keysight’s technical guidance on PCB assembly verification discusses these inspection and test approaches in the context of assembly verification.
How probe access changes the SMT-versus-THT comparison
ICT relies on electrical access to the board. A design with dense, fine-pitch SMT or BGA packages may leave fewer practical places for physical probes, even when the joints themselves are not the target of visual inspection. A test strategy is therefore more effective when considered during board design rather than after layout is fixed.
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- Plan test points: Provide accessible points for important nets where the design permits, and account for fixture and probe constraints.
- Consider boundary scan: Where devices support it, boundary-scan test logic can exercise or observe some interconnects without placing a physical probe on every node.
- Define coverage by fault class: Separate checks for visible solder or placement defects, hidden-joint structure, electrical opens or shorts and component properties, and intended board behavior.
No one of these methods finds every fault. ICT evaluates electrical behavior within its test design and conditions; functional testing exercises a defined use scenario. Both complement workmanship inspection rather than replace it.
How to choose a test strategy
- Identify the construction and package geometry. Determine which THT joints are accessible and which SMT connections, including any BGA joints, are concealed.
- Name the defects or behaviors that matter. Decide whether the goal is to inspect visible solder and placement, examine hidden joints, check electrical connections or confirm system-level operation.
- Check physical and logical access. Review test-point availability, probe and fixture constraints, and whether relevant devices support boundary scan.
- Match methods to the product and production context. Consider production volume, throughput, equipment, programming, operator resources, and required test coverage. Do not assume that a method is always cheaper or more reliable without accounting for those conditions.
- Set acceptance requirements before interpreting results. Use the applicable product requirements and contract documents to define workmanship and acceptance criteria.
Apply the right workmanship standard
IPC describes J-STD-001 as requirements for soldered electrical and electronic assemblies, covering materials, methods, and verification criteria. It describes IPC-A-610 as electronic assembly acceptability criteria and says the standards are developed in synergy. IPC’s revision resource lists separate through-hole and surface-mount solder-joint evaluation desk references, reflecting their distinct joint geometries.
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The applicable edition, class, and acceptance requirements depend on the contract and product. Confirm the current revisions and use the actual procurement and quality documents; a general visual or electrical test description is not a substitute for the detailed criteria in the applicable standard.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.Keep bare-board testing separate from assembly testing
Testing an unpopulated printed circuit board is not the same as inspecting soldered SMT or THT components. NASA’s discussion of PCB and assembly inspection distinguishes electrical probing of bare boards and destructive coupon tests for panel characteristics from inspection of populated assemblies.
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Similarly, historical NASA findings should be read in context. Its 1993 technical memorandum reported that none of the automated inspection systems it evaluated met all its criteria for high-reliability SMT applications, and that some could supplement, but not replace, manual inspection for low-volume high-reliability solder joints. That result concerns the systems and criteria of that period; it is not a verdict on current equipment.
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