Special offer. See more information about Outbyte and uninstall instructions. Please review EULA and Privacy policy.

NEC and Shanghai Hua Hong announced on February 24, 1999, that their Shanghai joint venture had completed its semiconductor plant and begun wafer production. The $1.2 billion facility was built around 8-inch wafers and a 0.35-micron process, and was a centerpiece of China’s 909 Project to develop a competitive domestic semiconductor industry.

What was the NEC–Hua Hong plant?

Shanghai Hua Hong NEC Electronics Co. Ltd. (HHNEC) was a semiconductor-manufacturing joint venture established in July 1997 by Shanghai Hua Hong, NEC and NEC (China), according to Hua Hong’s corporate history. Its fab was built in Shanghai as a major investment in China’s domestic chipmaking capacity.

On February 24, 1999, NEC and Shanghai Hua Hong announced that construction was complete and wafer production had begun. That milestone describes the start of wafer production, not proof that the fab had already reached its planned full output. EE Times’ contemporaneous report put the investment at $1.2 billion.

What technology and capacity were announced?

The plant was designed to process 8-inch (200 mm) wafers using a 0.35-micron design rule. At its February 1999 opening, EE Times described 0.35 micron as the smallest feature size then produced in China; that was a statement about China’s manufacturing capability, not a claim that the fab led the world. The process was behind the global state of the art at the time, but brought larger-wafer, commercial semiconductor production to China at a significant scale. EE Times’ opening report

Special offer. See more information about Outbyte and uninstall instructions. Please review EULA and Privacy policy.
#1 Best Overall
Esthepro Integrated Circuits Silicon Wafer Made by Copper Process (8 Inch)
  • Wafer Pattern May Vary from the Product Images. Great to be used as gift, display object, exhibition, educating demonstration, testing, decoration or your collection
  • Beautiful microchip pattern structure made by the advanced copper technology
  • 90~130nm minimum microchip feature Copper Characterization with TEOS or Black Diamond Low-k ILD on the single crystal silicon wafer
  • The original value of un-polished wafer is above $500
  • No guarantee for research and other applications

The 1999 announcement gave initial capacity as approximately 5,000 wafers per month, with a planned expansion to 20,000 per month. These were launch-era figures and an expansion target, not audited evidence of later production levels. EE Times’ production-start report

What was the 909 Project’s role?

The fab was a centerpiece of China’s 909 Project, an effort under the Ninth Five-Year Plan, which covered 1996–2000, to establish a competitive domestic semiconductor industry. EE Times’ account of the 909 Project described it as one of the plan’s main goals. HHNEC therefore represented more than a foreign-linked factory investment: it was part of a national effort to build local chip-manufacturing capability.

Rank #2
Esthepro Integrated Circuits Silicon Wafer Made by Copper Process (12 Inch)
  • Wafer Pattern May Vary from the Product Images. Great to be used as gift, display object, exhibition, educating demonstration, testing, decoration or your collection
  • Beautiful microchip pattern structure made by the advanced copper technology
  • 90~130nm minimum microchip feature Copper Characterization with TEOS or Black Diamond Low-k ILD on the single crystal silicon wafer
  • The original value of un-polished wafer is above $500
  • No guarantee for research and other applications

What was the factory intended to make?

Its initial products were 64-Mbit DRAM devices and logic ICs. The announcement described the logic chips as serving China’s custom market and the ASEAN and broader Asia-Pacific region, with world markets as a longer-term ambition. EE Times’ opening report

HHNEC pilot-ran DRAM in 1999, but the product mix did not remain fixed. Hua Hong’s corporate history says the company phased out DRAM in 2003 and began offering foundry services. Hua Hong’s corporate history

Special offer. See more information about Outbyte and uninstall instructions. Please review EULA and Privacy policy.
Rank #3
Integrated Circuit Real Chip, Uncut Ic Si Wafer Silicon, 5 in
  • 5 x 5 inches, 0.67 ounces, 0.03 inches thick. Some wafers are marked with alignment marks.
  • The pattern is produced by light diffraction, and its reflective appearance changes with the viewing angle.
  • Silicon wafers are fragile—please handle with care.
  • Circuit details can be examined under a microscope.

Key dates

Date Milestone
July 1997 HHNEC was established by Shanghai Hua Hong, NEC and NEC (China). Hua Hong’s corporate history
February 22, 1999 EE Times reported the fab’s official opening and described its planned process and initial products. EE Times
February 24, 1999 NEC and Shanghai Hua Hong announced construction completion and the start of wafer production. EE Times
1999 HHNEC pilot-ran its DRAM production line. Hua Hong’s corporate history
2003 HHNEC phased out DRAM and began foundry services. Hua Hong’s corporate history
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.Support on Ko-Fi

Why the start mattered

For China, the announcement marked the beginning of wafer production at a large, strategically significant domestic fab, combining 8-inch manufacturing with a process that was advanced by local standards in 1999. The investment’s importance lies in that industrial-policy and capability-building context—not in a claim that its technology was globally cutting edge. The plant’s later move away from DRAM toward foundry services also shows how its role evolved after the initial production plan.

Quick Recap

Bestseller No. 1
Esthepro Integrated Circuits Silicon Wafer Made by Copper Process (8 Inch)
Esthepro Integrated Circuits Silicon Wafer Made by Copper Process (8 Inch)
Beautiful microchip pattern structure made by the advanced copper technology; The original value of un-polished wafer is above $500
$39.99
Bestseller No. 2
Esthepro Integrated Circuits Silicon Wafer Made by Copper Process (12 Inch)
Esthepro Integrated Circuits Silicon Wafer Made by Copper Process (12 Inch)
Beautiful microchip pattern structure made by the advanced copper technology; The original value of un-polished wafer is above $500
$49.99
Bestseller No. 3
Integrated Circuit Real Chip, Uncut Ic Si Wafer Silicon, 5 in
Integrated Circuit Real Chip, Uncut Ic Si Wafer Silicon, 5 in
5 x 5 inches, 0.67 ounces, 0.03 inches thick. Some wafers are marked with alignment marks.
$18.50
Bestseller No. 4
Silicon Wafer 4inch P Type100 1-10Ω Single Side Polished Semiconductor Substrate【Nanosource】 (1)
Silicon Wafer 4inch P Type100 1-10Ω Single Side Polished Semiconductor Substrate【Nanosource】 (1)
Method: CZ ; Size: 4inch ;; Type: P-Type ; Dopant: B ; Orientation: 100 ;; Resistivity:1-10Ω ; Thickness: 525um±25 ;
$18.50
Best Value
Innconee Silicon Wafer 12 Inch Double-Sided Uncut Integrated Circuit Semiconductor Substrate Specimen Wafer Sheets for Science STEM Teaching Aid, Tech Geek Office Desk Decor Exhibition Gift
  • Genuine Silicon Wafer: crafted from high-purity silicon, this 12 inch silicon wafer features a precision double-side polished surface, delivering exceptional smoothness and mirror-like reflectivity on both sides, fitting well with tech decor needs; Please note: wafer pattern may vary from the product images
  • Genuine Uncut Ic Silicon Wafer: this is a genuine uncut IC silicon wafer, not a replica or model; It preserves the original circular wafer form applied in semiconductor manufacturing, allowing you to experience real chip substrate material up close
  • 12 Inch Large Size Versatile Display: with a full 12 inch diameter, this wafer provides a striking visual presence compared to smaller 6 or 8 inch wafers; Its larger size enhances the natural light interference patterns, creating subtle rainbow reflections under different lighting, ideal for desk display, office decor, exhibitions, or as a centerpiece for tech-inspired spaces; Silicon crystals are very fragile, please handle them as gently as possible
  • Practical Stem Education Tool: a valuable teaching tool for STEM education, this semiconductor substrate helps illustrate how integrated circuits are manufactured; Great for classrooms, labs, or personal learning, it allows students to better understand wafer structure, fabrication processes, and the foundation of modern electronics in a tangible way
  • Tech-inspired Gift: combining science and art, this silicon wafer makes a unique gift for engineers, programmers, students, and tech lovers, suitable for various gifting occasions without being overly decorative
Rank #4
Silicon Wafer 4inch P Type100 1-10Ω Single Side Polished Semiconductor Substrate【Nanosource】 (1)
  • Method: CZ ; Size: 4inch ;
  • Type: P-Type ; Dopant: B ; Orientation: 100 ;
  • Resistivity:1-10Ω ; Thickness: 525um±25 ;
  • Front Side: Polished ; Back Side: Etched ; TTV<10um;
  • [Nanosource] High Quality Silicon Wafer. Customized Products Available.

Product prices and availability are accurate as of the date/time indicated and are subject to change. Any price and availability information displayed on Amazon at the time of purchase will apply.