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The manufacturer describes operation to approximately 57 kHz. That is a headline MAX261 capability, not a guarantee that every mode, Q setting, clock ratio, supply, and accuracy requirement will produce an ideal continuous-time response at that frequency.
What the MAX261 does
Unlike a fixed low-pass IC, the MAX261 combines two programmable second-order filter sections. Each section can be set independently, allowing one section to operate alone or both to be cascaded for a fourth-order response.
- Filter modes: low-pass, band-pass, high-pass, notch, and all-pass.
- Frequency control: a 6-bit code for each section.
- Q control: a separate 7-bit code with 128 programmable values.
- Clocking: separate CLK A and CLK B inputs.
- Supplies: single +5 V or bipolar ±5 V operation, within the datasheet’s specified supply limits.
Typical uses include programmable anti-alias filters, adaptive filters, signal-analysis front ends, phase-locked-loop filtering, and tunable band-pass or notch circuits. “No external components required” refers to the internal frequency-setting network; a practical circuit still needs clock generation, supply bypassing, source/load management, and possibly anti-alias or clock-feedthrough filtering.
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See the Analog Devices MAX261 product page and the official MAX260/MAX261/MAX262 datasheet for current ordering information and electrical limits.
How the switched-capacitor architecture works
Each section uses a state-variable topology with two cascaded integrators and a summing amplifier. On-chip switches repeatedly transfer charge through capacitors, creating effective time constants set by the clock and internal capacitor ratios. This avoids the external resistors and capacitors normally used to set an analog filter’s corner frequency.
The MAX261 is nevertheless a sampled system. Its external clock is divided by two internally:
fsample = fCLK / 2
Therefore, do not use the external clock frequency directly as the sampling rate when evaluating Nyquist limits or aliasing. At sufficiently high clock-to-filter-frequency ratios, the response approximates a continuous-time active filter; at lower ratios, sampling-related frequency and response errors become more significant.
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Programming center frequency and Q
Frequency code
For MAX260/MAX261 modes 1, 3, and 4, the datasheet gives the clock-to-center-frequency relationship:
fCLK/f0 = ((64 + N)π) / 2
Here, N is the 6-bit frequency-control value from 0 through 63. In mode 2, the available ratios are divided by √2. In practice:
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f0 = fCLK / RN
where RN is the ratio for the selected mode and code. For example, with mode 1, N = 0 gives R = 32π ≈ 100.53. A 1 MHz clock therefore produces a calculated center frequency of about 9.95 kHz. This is a code-based calculation; realized frequency and response accuracy still depend on mode, Q, tolerances, supply, temperature, and sampling correction.
Use the frequency table in the datasheet rather than rounding a remembered formula when selecting a production code.
Q code
Q is programmed independently with seven bits. The available range extends from approximately 0.5 to high-Q settings around 64, depending on the response mode. Code resolution does not equal absolute Q accuracy: the datasheet’s stated Q errors vary with grade, selected Q, mode, and operating conditions. For example, its specified MAX261 results are around ±2% for Q = 32 in the applicable grade class and can be about ±4% at Q = 64, with larger maximum deviations for the B grade.
Important edge case: writing all zeroes to the Q-control bits for filter A invokes a low-power shutdown that deactivates both filter sections. Do not use an all-zero Q field as an ordinary low-Q setting.
Clock, interface, and power requirements
Clock sources
The clock circuit can use a crystal, an RC network, or an external clock generator. For the RC oscillator, the nominal relationship is:
fCLK ≈ 0.45 / (RC)
That equation is a starting point, not a substitute for checking clock accuracy, amplitude, and the final duty-cycle and frequency behavior. Although duty cycle is relatively unimportant because of the internal divide-by-two arrangement, the resulting sample rate remains central to aliasing and clock-ratio errors.
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Parallel programming
The interface includes data inputs D0 and D1, address inputs A0 through A3, write control WR, separate section clocks, and mode/output pins. A typical programming sequence is:
- Define the required response and determine each section’s mode, center frequency, Q, and expected gain.
- Choose a clock frequency and obtain the frequency code from the official table.
- Obtain the Q code for the selected mode and Q.
- Place the address and data fields on the parallel interface.
- Assert WR using the setup, hold, pulse-width, and logic-level limits in the datasheet.
- Repeat the write for the other section if it is used.
- Measure the resulting response and check frequency, Q, gain, noise, feedthrough, and clipping.
The datasheet’s printer-port example demonstrates the address and register concept, but it is historical sample code rather than a current MCU driver. Firmware must implement the published timing requirements for the exact device and voltage.
Supplies and bypassing
The MAX261 supports single +5 V and ±5 V arrangements; the datasheet also specifies operation across a broader total-supply range under its stated conditions. With a single supply, bipolar signals require suitable biasing and the input/output common-mode limits must be respected. Place bypass capacitors close to the supply pins with short connections, and keep clock and digital-return currents from contaminating sensitive analog paths.
Signal levels, impedance, and loading
Under specified conditions, the filter outputs are intended to drive 10 kΩ loads and can approach the supply rails to roughly 0.15 V with that load. The electrical-characteristics table also lists approximately ±4.75 V swing into 10 kΩ on ±5 V supplies. A heavier load reduces swing and can distort the response, so use an external buffer when the following circuit is lower impedance or cable-driven.
The switched-capacitor input is not a high, fixed op-amp input resistance. Its approximate effective resistance is:
RIN ≈ 2 / (CIN fCLK)
With CIN about 12 pF and a 500 kHz clock, the datasheet illustrates an input resistance of about 333 kΩ. A source with substantial impedance therefore changes gain and filter behavior as the clock is changed. Buffer the source or include its impedance in simulation and measurement.
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A practical MAX261 design workflow
- Specify the response. Choose low-pass, band-pass, high-pass, notch, or all-pass, and define passband, attenuation, gain, and allowable error.
- Choose order. One section provides a second-order response; cascade both sections for fourth-order behavior.
- Calculate section parameters. Determine f0, Q, mode, and expected gain for every section.
- Select the clock. Ensure the clock supports the target frequency while leaving enough clock-to-f0 ratio for the required accuracy and alias margin.
- Select codes. Use the official frequency and Q tables, including the selected mode and device grade.
- Check sampling correction. Consult the datasheet’s correction curves or currently available Analog Devices/Maxim design resources if operating near a low clock ratio.
- Build the clock and analog interfaces. Choose crystal, RC, or external clocking; provide bypassing; buffer high-impedance sources or loads; and plan anti-alias and feedthrough filtering.
- Program and verify. Write both sections with datasheet-compliant timing, then measure center or corner frequency, Q, gain, noise, clock components, and clipping across expected conditions.
Limitations to design around
Clock feedthrough
Switching energy can appear at the input or output. The datasheet reports feedthrough in the millivolt range under specified conditions and shows external RC low-pass filtering as a suppression method. Keep clock traces short and separated from high-impedance analog nodes, and filter the output when the application cannot tolerate clock components.
Aliasing
Because the internal sample rate is fCLK/2, signal energy near or above the relevant Nyquist region can fold into the passband. Add an input anti-alias filter when upstream signals or interference can occupy that region, especially in data-acquisition systems.
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Lower clock-to-f0 ratios increase deviation from an ideal second-order response. The datasheet indicates that errors are often below 1% in many cases, but recommends correction or design software when the ratio is low enough for the error to matter. Treat that figure as a conditional datasheet statement, not a universal total-accuracy specification.
Noise and clipping
Published wideband-noise values range from tens to roughly 100 µV RMS for particular test configurations; they are not a universal noise floor. High-Q resonant responses can create substantial internal or output gain. Budget the worst-case input amplitude, Q, gain, and supply swing before hardware testing.
Digital and supply interference
Clock oscillators, parallel programming lines, and switched-capacitor currents can inject interference into the analog path. Use short bypass paths, a deliberate grounding strategy, separation of noisy digital traces, and output filtering where necessary.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.MAX261 compared with related parts
| Part | Main distinction | Trade-off or best-fit boundary |
|---|---|---|
| MAX260 | Better DC and offset behavior | Emphasized for lower frequencies; does not provide the MAX261’s higher-frequency range. |
| MAX261 | General-purpose dual universal filter, programmable by microprocessor, approximately 57 kHz headline range | Legacy parallel interface and sampled-system artifacts require careful implementation. |
| MAX262 | Higher center-frequency capability, stated at approximately 140 kHz | Lower clock-to-f0 ratios increase deviation from an ideal continuous-time response. |
| MAX263/MAX264 | Pin-programmable alternatives | Simpler hardware selection, but not the same firmware-controlled retuning flexibility. |
| MAX291/MAX292/MAX295/MAX296 | Fixed-response, high-order switched-capacitor low-pass family | Appropriate for straightforward low-pass filtering, not universal modes or independently programmable Q. |
Product references: MAX260, MAX262, MAX263, and MAX291.
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Is the MAX261 still a good choice?
It fits when
- You need digitally retuned analog filtering rather than a fixed response.
- A dual second-order universal filter meets the required order.
- Your operating range is in the low-kilohertz region to approximately 57 kHz with acceptable sampling artifacts.
- +5 V or ±5 V analog supplies and a parallel programming interface are acceptable.
- A legacy component with exact-suffix procurement checks fits the product lifecycle.
Reconsider it when
- The signal has substantial energy near the clock or its aliases.
- Very low noise, excellent DC accuracy, or modern low-voltage operation is required.
- The required frequency exceeds the practical MAX261 range.
- A simple fixed low-pass filter would meet the requirement with less complexity.
- Firmware-controlled parallel programming or long-term legacy-part sourcing is undesirable.
Analog Devices lists PDIP and wide-SOIC variants and provides Sample & Buy links on its product page. Any displayed price or stock signal applies to a particular listing and time; select the exact suffix rather than ordering against the generic MAX261 name.
Frequently Asked Questions
Can the MAX261 run from a single 5 V supply?
Yes. It supports single +5 V operation, but input biasing, common-mode range, output swing, and bypassing must be designed for a single-supply circuit.
Does the MAX261 need external capacitors to set frequency?
No external frequency-setting capacitors or resistors are required because the switched-capacitor network is internal. You still need a clock source, supply bypassing, and possibly source buffering, anti-alias filtering, or clock-feedthrough filtering.
Can both sections make a fourth-order filter?
Yes. Each section is second order, and cascading the two sections produces a fourth-order response when the section parameters are chosen appropriately.
What is the difference between the MAX261 and MAX262?
The MAX262 targets a higher center-frequency range, approximately 140 kHz according to the manufacturer, but its lower clock-to-frequency ratios produce greater sampling-related deviation. The MAX261 is the lower-frequency general-purpose option.
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