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To compile and simulate an AMD AI Engine graph, use the Vitis compiler in AI Engine mode, then choose a simulator that matches your immediate goal: x86simulator for fast functional checks, or aiesimulator for cycle-approximate timing and resource analysis. The target used during compilation matters: the functional path uses an x86sim build, while the documented aiesimulator path uses a hw build.

The examples below follow AMD Vitis 2026.1 documentation. Match the platform, paths, and instructions to your installed Vitis release and target hardware.

Choose the simulator for the question you need to answer

Need AMD path What it tells you
Quick functional checks and debugging x86simulator after an x86sim build Checks functional behavior and supports fast iteration. It does not establish cycle-accurate performance.
Timing- and resource-oriented analysis of the AI Engine array aiesimulator after a hw target build Provides cycle-approximate simulation. AMD describes NoC and DDR behavior as represented by transaction-level SystemC models in the AI Engine model.
System simulation across separately compiled AI Engine graphs and HLS kernels Vitis Functional Simulation (VFS) Useful when the simulation boundary includes multiple components. The cited VFS documentation is UG1076 for Vitis 2025.2; consult documentation matching your installed release for setup details.
Simulink stimulus, visualization, or code generation involving AI Engine, HLS, or RTL Vitis Model Composer A separate graphical workflow, not a required stage of the basic compile-and-simulate flow.

AMD’s AI Engine Kernel and Graph Programming Guide (UG1079, 2026.1) distinguishes functional simulation from cycle-approximate simulation. Treat the output of each as answering a different question: functional correctness first, then timing-oriented behavior when needed.

Compile an AI Engine graph from the command line

The Vitis compiler supports an AI Engine mode invoked with v++ -c --mode aie. In AMD’s Vitis 2026.1 reference guide, a representative hardware-target command is:

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v++ -c --mode aie --target hw --platform vek385_base 
  --work_dir ./myWork --config ./config.cfg <Input File>

Here, --platform identifies the target platform or device, --work_dir selects where build outputs are written, and the input is the graph code. --config supplies compiler configuration. vek385_base is an example platform name, not a universal default; use a platform supported by your installed Vitis release and matching your target.

For a functional x86 simulation build, replace the target with --target x86sim. For the hardware-target build, AMD documents generation of libadf.a for simulation and device execution. The target is therefore a compile-time choice as well as a simulator choice.

See AMD’s Vitis Reference Guide (UG1702, 2026.1) for the documented compiler options and output behavior. The paths and input placeholder above must be replaced with your project’s actual files.

Run functional simulation with x86simulator

  1. Compile the graph for functional simulation using the x86sim target, setting the platform, work directory, configuration, and input for your project. The compile form is v++ -c --mode aie --target x86sim --platform <platform> --work_dir <work-directory> --config <config-file> <graph-input>.

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  2. Run x86simulator against the package directory and input directory. AMD’s tutorial gives this example invocation:

    x86simulator --pkg-dir=./Work --i=../../
  3. Inspect the generated simulation outputs and logs to check functional behavior. The package and input paths in the example are relative to its tutorial layout; adjust them to your project.

This path is intended for functional verification and debugging, rather than cycle-approximate performance conclusions. AMD’s Vitis AI Engine development tutorials (XD100, 2026.1) cover compiler, simulator, and performance-analysis workflows.

Run cycle-approximate simulation with aiesimulator

  1. Compile the AI Engine component with --target hw, using the platform and project configuration appropriate to your setup.

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  2. Run the simulator on the resulting package. AMD’s example command is:

    aiesimulator --pkg-dir=./Work --i=../..
  3. Review the simulation run summaries and logs. The example input and package paths are tutorial-relative, so adapt them to your directory structure.

aiesimulator is the cycle-approximate option for timing- and resource-oriented analysis. Its model includes transaction-level SystemC representations of NoC and DDR, so interpret results within that model rather than as a claim of cycle-exact behavior of every system component. AMD documents this simulator scope in UG1079 (2026.1); its command examples are in the Vitis Getting Started tutorial (XD098, 2026.1).

Use the Vitis IDE or command line

Build and run in the IDE

AMD’s 2026.1 XD100 tutorial shows selecting an AI Engine component, opening aiecompiler.cfg, building under X86 SIMULATION, and running an x86sim launch configuration. The tutorial uses -O0 as a debug-oriented setting to improve visibility; it is an example for debugging, not a general optimization recommendation. Follow the steps in AMD’s Build and Simulate in the Vitis IDE tutorial (XD100, 2026.1).

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Inspect reports and integrate command-line outputs

The IDE can display compilation and simulation reports and help analyze compiler-generated output files. AMD states in UG1079 (2026.1), “The Vitis IDE is available for report viewing and analysis of the output files and reports generated by the command line tools.” Command-line builds and simulations also produce files that can be integrated into customer build environments; the IDE itself generates command-line outputs for subsequent integration. See AMD’s AI Engine Tools and Flows User Guide (UG1076, 2026.1).

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When to use the related system-level tools

Vitis Functional Simulation

VFS addresses system simulation involving multiple separately compiled AI Engine graphs and HLS kernels. It is relevant when a single graph’s functional or cycle-approximate simulation does not cover the system boundary you need to exercise. The cited description is from AMD’s UG1076 Vitis 2025.2 documentation; use the guide for your installed release for version-specific setup.

Vitis Model Composer

Model Composer is the distinct Simulink-based route for simulation and code generation that can include AI Engine, HLS, and RTL. It is an alternative entry point for workflows built around Simulink, not a prerequisite for compiling a graph with v++. AMD describes it in UG1076 (2026.1).

Practical checks before running

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