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IAR Embedded Workbench for Arm documents compiler optimization levels and controls for trading off debuggability, execution speed, and code size. The available guides explain how to configure and evaluate those options, but they do not establish that the capabilities were newly added in a specific announcement. IAR’s version 9.70.1 release-note highlights do not list a new optimizer feature.
What the IAR compiler optimization settings do
Optimization settings govern how much the compiler transforms code while generating object code. The IAR guides describe four levels—None, Low, Medium, and High. At High, you can select a goal of balanced performance, speed, or size. When a transformation cannot improve speed and size at the same time, the selected goal guides the compiler’s choice.
The guides describe transformations including common-subexpression elimination, loop unrolling, function inlining, code motion, type-based alias analysis, static variable clustering, and instruction scheduling. The development guide also names dead-code elimination, constant propagation, precision reduction, and induction-variable elimination. Which transformations apply depends on the selected level and the compiler and target configuration; the full list should not be read as a promise that every transformation runs in every build.
Which optimization level should you choose?
| Level or goal | What the guide establishes | Practical use |
|---|---|---|
| None | Provides the best debug support. | Use when source-level debugging and straightforward inspection matter most. |
| Low or Medium | Applies lower optimization than High; the guide does not assign a specific speed or size result to either level. | Consider when you need some optimization but want to compare debug behavior and output against a higher level. |
| High — balanced | High optimization with a balanced goal. | A reasonable starting point when neither code size nor speed is the sole priority. |
| High — speed | High optimization with a speed-favoring goal. | Evaluate for time-critical code, then measure on the intended core and workload. |
| High — size | High optimization with a size-favoring goal. | Evaluate when fitting within flash or memory limits is important. |
IAR’s IDE guide describes different defaults for debug and release projects: debug projects default to size optimization intended to remain fully debuggable, while release projects default to high balanced optimization. These are guide-documented defaults, not a guarantee for every installed version or project template; check the actual project settings before relying on them.
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Where to configure optimization
IAR documents settings at application, file, and function scope. This lets a project use a general policy while adjusting selected code where needed. Some individual transformations can also be disabled. The precise controls available depend on the installed compiler and target configuration, so use the settings exposed by that build rather than assuming every transformation can be controlled in every context.
Match the configuration to the ARM target
Set the processor target to the actual ARM core before comparing builds. IAR warns that generated object code is not always binary-compatible across supported cores, so results from one core cannot automatically be applied to another. Confirm relevant instruction-set and floating-point settings as well.
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For a target with a VFP coprocessor, IAR’s guide describes the --fpu option for generating floating-point operations through the coprocessor rather than software floating-point library routines. That choice depends on the hardware and project configuration; it is not a general-purpose optimization toggle for every ARM target.
How to measure whether a setting helps
- Record the compiler version, selected core, relevant target options, runtime-library configuration, and build configuration.
- Build the same source with the optimization settings you want to compare. Keep other project settings unchanged.
- Measure execution time on the target using the workload that matters to your application, and compare output size using the same build artifacts and accounting method.
- Check whether the optimized build remains correct and whether its debug behavior meets your needs.
The documentation explains the available trade-offs but supplies no universal speedup or code-size reduction. A result is meaningful only for the specific project, compiler version, core, and workload measured.
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What version 9.70.1 release notes establish
IAR’s Embedded Workbench for Arm 9.70.1 release notes highlight Zephyr kernel 4.1-or-later build support, selected C++20 features, and additional Arm core support. Those listed highlights do not mention a newly added optimizer feature. That does not rule out optimization-related changes elsewhere in component notes; it limits the conclusion to the highlights on the reviewed release-notes page.
A historical example illustrates why version context matters: the version 8.32.3 release notes describe optimized DLIB runtime-library variants, including a small integer-division routine for Cortex-M0 and a fast strcpy implementation for Thumb-2-capable cores. The notes say compiler and linker selection followed the optimization goal, with --use_optimized_variants available to override it. This is a v8.32.3 example, not evidence of a new v9.70.1 feature.
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Official documentation
- IAR C/C++ Development Guide for ARM — optimization behavior, target configuration, and floating-point guidance.
- IAR Embedded Workbench IDE Project Management and Building Guide for ARM — optimization levels, goals, project defaults, and IDE settings.
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