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1Scan for outdated or missing drivers - takes under a minute2Repair Windows errors before they cause bigger problems3Fix the driver behind crashes, sound loss and screen glitchesFor a DC power path that must carry current from A to B and B to A when enabled, yet block both directions when disabled, use two N-channel MOSFETs connected back-to-back and drive both gates with a suitable driver referenced to the correct source or floating node. One MOSFET is normally insufficient because its intrinsic body diode still conducts in one direction.
Before choosing parts, define the voltage range and transients, continuous/peak/inrush current, DC or bipolar operation, high- or low-side placement, switching frequency, allowable off-state leakage, control voltage, fail-safe state, and required reverse-polarity, short-circuit, overvoltage and inrush protection.
Define what “bidirectional” means
- Bidirectional conduction: the enabled channel carries current in either direction.
- Bidirectional blocking: the disabled switch prevents current in either direction.
- Bidirectional voltage rating: either terminal may be at the higher potential without exceeding device ratings.
- Bidirectional AC switching: terminal polarity can alternate; this needs gate drive that remains valid as both terminals move.
- Bidirectional regulation: controlled energy transfer between rails, which requires a converter and current sensing, not just a disconnect.
The design below addresses a two-terminal DC power switch. Bipolar signal and regulated-power alternatives are covered later.
Why one MOSFET does not block both directions
An enhancement MOSFET channel has low resistance in either direction when on, but every power MOSFET also contains an intrinsic body diode. With the gate off, that diode is forward-biased for one polarity, so a single device cannot provide true two-direction isolation.
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Two MOSFETs in reverse series put their body diodes in opposite directions. At least one diode is reverse-biased for either current direction, while both channels conduct when the gates are enhanced. This principle is described in the Analog Devices PowerPath primer and AN53.
Back-to-back topologies
Common-source
Connect the two sources together and use the outer drains as terminals A and B (or use the equivalent orientation dictated by the selected part’s body-diode symbol). Drive both gates relative to the common-source node. This is common in battery disconnects and reverse-current-blocking paths, but the source node can move during switching.
Common-drain
Connect the drains together and use the outer sources as A and B. Some high-side driver architectures favor this arrangement. The electrical symmetry does not remove the requirement to control each MOSFET’s gate-source voltage independently.
Always draw the actual intrinsic diode direction from the chosen datasheet rather than relying on labels alone. TI and Infineon document both arrangements in their driver material: TI LM74502 and the Infineon EiceDRIVER selection guide.
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Choose the gate-drive architecture
Low-side, ground-referenced switch
If the MOSFET sources remain near ground, a logic-level gate driver can drive both gates. Use one gate resistor per device, a gate-source pull-down on each gate, undervoltage lockout (UVLO), controlled turn-on/off, and local driver bypassing. Separate resistors let you damp ringing and tune each transition; see the TI gate-drive discussion.
High-side N-channel switch
A 3.3-V or 5-V MCU pin cannot directly drive gates whose sources sit near a 24-, 48- or 100-V rail. Use a dedicated high-side driver, charge pump, isolated driver, or a bootstrap driver whose duty cycle allows refresh. A bootstrap capacitor may discharge during a static 100% duty-cycle on-state; a charge-pump driver is better for indefinite on-time. The Analog Devices LTC7001 is a high-side N-channel driver with an internal charge pump and operation up to 135 V.
Dedicated power-path controller
For battery and protected power paths, a controller designed for external back-to-back MOSFETs can add UV/OV cutoff, enable control, reverse-polarity handling, inrush control or fault reporting. Check the exact operating mode: the LM74502 supports a 3.2–65-V input range and an integrated charge pump, but its datasheet states that it does not provide reverse-current blocking. The LM7472EVM materials are aimed at two back-to-back N-channel MOSFETs with ideal-diode and switched-power-path behavior.
Select the MOSFETs
Voltage rating
Set VDS above the maximum steady voltage plus measured or modeled switching transients. Include hot-plugging, cable inductance, connector bounce, motor regeneration, load dump, TVS tolerance and avalanche energy. “Twice the supply voltage” is only a preliminary heuristic, not a universal rule.
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On-resistance and heat
Use maximum RDS(on) at the intended gate voltage and hot temperature. For two devices:
Pcond = IRMS2(RDS(on),1 + RDS(on),2)
For identical MOSFETs this is approximately 2IRMS2RDS(on), and the voltage drop is I(RDS(on),1 + RDS(on),2). Include package, copper, vias and connector resistance.
Gate charge and switching loss
The driver charges two gates. Average gate-drive current is approximately IG,avg ≈ 2QGfSW, and gate-drive power is approximately Pgate ≈ 2QGVDRVfSW. A first hard-switching estimate for each MOSFET is Psw ≈ ½VI(tr+tf)fSW; add capacitive, reverse-recovery and driver losses.
SOA and diode behavior
If you slew the gate to limit inrush, check DC and pulsed safe-operating-area curves at the actual drain voltage and pulse duration. A high current rating in the fully enhanced state does not guarantee safety in linear mode. For PWM or fast commutation, evaluate body-diode reverse recovery and switching specifications.
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Support circuitry and layout
- Place an individual gate resistor at each gate; use different turn-on and turn-off impedances if necessary.
- Add gate-source pull-downs so both devices remain off while the controller is unpowered or disconnected.
- Use a gate-source zener/TVS when parasitic inductance or high dV/dt could exceed the MOSFET’s |VGS| rating.
- Put the driver’s bypass capacitor directly at its supply pins.
- Use Kelvin source returns, short gate loops and symmetrical power routing.
- Keep MOSFETs, local capacitors, TVS and high-current returns in a compact loop.
- Observe creepage and clearance for higher-voltage or safety-related designs.
The Infineon gate-drive application note discusses parasitics and implementation details.
Turn-on, turn-off and inrush
- Confirm the driver supply is within UVLO limits and hold both gates low during startup.
- Turn on both gates together, or use a controlled sequence that does not force high current through one still-off body diode.
- Verify the intended gate-source voltage at each MOSFET, not merely the driver output pin.
- For turn-off, actively pull both gates low and prevent Miller-induced turn-on.
- Provide dead time when the pair is part of a commutating converter.
- Use a current-limited supply for initial testing and a suitably rated differential probe.
Charging a capacitive load or motor can create high inrush. Options are controlled gate slew, a hot-swap controller, precharge resistor plus bypass MOSFET, upstream current limiting or active current regulation. Slower slew lowers inrush but raises linear-mode dissipation, where P(t)=VDS(t)ID(t).
Transient protection
For motors, solenoids, relays, long cables and switched batteries, select a TVS by working standoff voltage, clamping voltage, pulse energy, repetition rate and thermal path. Add an RC/RCD snubber only after measuring ringing, provide local ceramic and bulk capacitance, and coordinate fuses or current limiting. A TVS alone is not a current limiter.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.Thermal verification
Estimate junction temperature as TJ=TA+PlossθJA, using the manufacturer’s specified board conditions. Validate both MOSFET case temperatures, hot resistance and worst-case ambient; PCB copper, vias, airflow and neighboring heat sources can dominate the result.
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Bring-up and test sequence
- With no gate drive, verify that both devices block at low voltage and that no gate floats.
- Enable the pair and measure resistance in both current directions at low current.
- Apply maximum expected voltage without load current, then test reverse-current blocking.
- Increase to nominal current and record each device’s temperature.
- Test the real capacitive or inductive load and capture both terminal voltages, both gate-source voltages, current and driver supply.
- Test controller brownout, supply removal, reverse connection, shorted output, hot-plugging and repeated cycling.
Troubleshooting
| Symptom | Likely cause | Action |
|---|---|---|
| Current flows when off | Forward body diode, wrong orientation or gate not low | Check diode directions and both VGS measurements. |
| Works in one direction only | Single MOSFET or incorrect back-to-back wiring | Redraw the intrinsic diodes and verify opposing orientation. |
| Overheats while on | Hot resistance, insufficient gate voltage or poor thermal path | Measure gate voltage at the die/package and improve copper/thermal design. |
| Fails at turn-off | Inductive overshoot or inadequate voltage margin | Add correctly rated TVS/snubber, shorten the loop or control shutdown. |
| Gate exceeds rating | Source movement, Miller coupling or driver overshoot | Add a gate clamp and improve return inductance. |
| Turns on unexpectedly | Floating gate, Miller turn-on or unpowered controller | Add gate-source pull-downs and active discharge. |
| Startup surge | Load capacitance or motor inrush | Use precharge, soft start or hot-swap control. |
| MCU resets | Ground bounce, EMI or gate-current spikes | Separate returns, improve decoupling and reduce power-loop area. |
| High-side N-FET never fully turns on | Gate is not above its source | Use a charge pump, suitable bootstrap driver or P-channel design. |
When another solution is better
| Requirement | Better starting point |
|---|---|
| Low-voltage, modest-current rail | Integrated load switch with current limiting and slew control. |
| 12–65-V protected DC path | Dedicated controller plus two N-channel MOSFETs; verify reverse-current behavior. |
| Very low leakage or galvanic isolation | Relay, contactor or isolated solid-state relay. |
| Bipolar analog/data signal | Dedicated analog switch or transmission gate. |
| Controlled energy transfer between rails | Bidirectional buck-boost or bridge converter, such as architectures referenced by LTC7872. |
P-channel pairs can simplify low-current high-side drive, but usually have higher resistance. For integrated low-voltage alternatives, see TI’s ideal-diode and ORing portfolio. A P-channel controller such as LTC4412 is intended for lower-voltage PowerPath applications, not a universal two-direction disconnect.
Parameters needed for a defensible schematic
Provide these values before selecting a controller or MOSFET:
Voltage range: Maximum transient: Continuous current: Peak/inrush current: Current direction: DC or AC: High-side or low-side: Switching frequency: MCU/logic voltage: Required off leakage: Load type: Protection required:
The Bottom Line
For a DC bidirectional disconnect, start with correctly oriented back-to-back N-channel MOSFETs and a driver that can maintain safe gate-source voltage in the chosen high- or low-side location. Size the pair for hot resistance, gate charge, SOA and transients, then validate inrush, turn-off overshoot, brownout and reverse-current behavior on the real layout.
Quick Recap
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