An FPGA power solution must do more than supply enough current: it must keep several rails within their voltage and noise limits as workload changes, while giving the system a way to monitor and adjust power. Monolithic Power Systems’ MPM3698 and MPM3699 modules combine power conversion with PMBus telemetry and AVSBus support; MPS’s Intel Agilex example shows how they can be used in a high-current core/HPS rail. The example is a reference design, not a universal rail specification—validate it against your FPGA, board, and workload.
Why an FPGA needs a carefully designed power tree
FPGA consumption changes with the device model, logic-cell use, firmware, clock and PLL settings, and operating conditions. A rail sized for one workload may face a different current demand when the design is active, so the power tree has to maintain its requirements across both steady load and changing load.
The relevant domains do not all have the same constraints. Core and HPS rails need tight voltage control as current varies; transceiver rails are particularly sensitive to noise. Treat each rail according to the FPGA’s power requirements rather than assuming one regulator or one accuracy target fits every domain.
What the MPS modules integrate
MPM3698 and MPM3699 combine the controller, power stages, inductors, and most passive components in a compact module. MPS says this integration reduces parasitic inductance and capacitance, improves thermal connectivity and efficiency, and reduces discrete-component count and PCB layout effort. It can also make capacitor selection and prototyping simpler; it does not remove the need to verify the board’s thermal, electrical, and layout performance.
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- Precision 5V Power Delivery — 4V-30V input to fixed 5V output; 3A continuous / 4A peak current. Direct PCB-mount design for surface-mount or through-hole integration, saving board space in compact embedded systems.
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- Built-In Protections for Reliable Operation — Features soft-start, under-voltage lockout (UVLO), and thermal shutdown protection to prevent damage during overload or extended high-current operation.
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For an integrated module versus a discrete controller, MOSFET, and inductor design, weigh the whole implementation—not only the regulator’s unit price.
| Decision factor | Integrated MPS module | Discrete design |
|---|---|---|
| Current headroom | MPS’s 2024 Agilex example shows the MPM3698/MPM3699 rail combination handling up to 200 A. The MPM3698 product page, accessed October 1, 2026, lists a 16 V, peak 120 A rating for that part; this is not the same as a continuous-current claim. | Depends on the selected controller, power stages, magnetics, thermal design, and implementation; no comparable rating is stated in the MPS example. |
| Transient accuracy | MPS describes a 2% or 3% output-voltage accuracy target during very fast transients. Treat it as the target in the described design context, not a guarantee for every board or load step. | Depends on component selection, compensation, layout, output capacitance, and the FPGA load; no directly comparable test result is stated. |
| Telemetry and control | MPM3698 and MPM3699 support PMBus and AVSBus for monitoring, configuration, and adaptive-voltage control. | Protocol support depends on the controller and surrounding circuitry; not stated for a generic discrete design. |
| Area, parasitics, and thermal path | Integration can reduce parasitics and solution area; MPS says it improves thermal connectivity. Confirm actual board area and thermal behavior in the target layout. | Separate components provide design flexibility but require more placement and routing; no comparative area or thermal measurements are stated. |
| Capacitors and protection | Capacitor needs remain design-specific. MPS lists over-voltage and under-voltage protection, thermal shutdown, active voltage positioning, automatic phase shedding, and VID-code functions. | Capacitor count and protection depend on chosen parts and implementation; no generic count or feature set is stated. |
| Availability and cost | MPS says an integrated module can have a higher unit cost than discrete components yet lower total cost through fewer parts, less assembly time, reduced design-error risk, and faster prototyping and production. Current availability and pricing are not established here. | Discrete parts may cost less individually, but assembly and design effort contribute to total cost. No comparable bill of materials, availability, or cost figures are stated. |
How PMBus, AVSBus, and SmartVID fit together
PMBus provides digital communication for real-time VIN, VOUT, current, and temperature monitoring, as well as regulator configuration such as digital loop settings. AVSBus connects the regulator with the FPGA’s adaptive-voltage control. Together, those interfaces provide telemetry and a control path rather than only a fixed analog setpoint.
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MPS describes Intel SmartVID as adaptive voltage scaling that compensates for process variation. Its June 7, 2024 application note depicts MPM3698/MPM3699 with a VID controller, PMBus, and a voltage-regulator controller. The precise behavior and supported configuration depend on the FPGA and system implementation; verify the required interface and sequencing against the device documentation.
MPS also lists over-voltage protection, under-voltage protection, thermal shutdown, active voltage positioning, automatic phase shedding, and VID-code functions. These features can help manage protection and load behavior, but they do not replace board-level checks or system fault planning.
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- There is a green LED to indicate the presence of power, and an ON / OFF latching switch to control the power to the board.
- The input voltage through the barrel socket must be between 6.5 V and 12 V. Hence, if you wish to use it to its maximum capability you will need to remain in that range. This is a non-adjustable fixed power supply model, which is good enough for most applications.
- Maximum output current to be 700 mA. However, it is probably better to use much lower voltages and current to be on the safe side in case you make a mistake on your breadboard circuit.
- With 9V battery snap power cable T-type 5.5x2.1mm connector.
- How to use: This is a plug-in power supply and the headers below the board simply plug-in to the breadboard. Once plugged in, the voltage rails to both sides on the breadboard then provide power. You then use the yellow jumpers to select the voltage levels required. This is a dual output 3.3 V, 5 V regulated board and you can have either voltage on either rail on the breadboard, which is very useful.
What the Intel Agilex example specifies
MPS’s 2024 power-tree example uses a 4 V to 16 V input and illustrates a 0.8 V core/HPS output rail with a maximum ±3% DC+AC tolerance. In that illustrated combination, MPM3698 and MPM3699 are shown supporting up to 200 A. These are figures for the example, not default requirements for every Agilex design or a claim that either module alone supplies 200 A.
The MPS discussion also names a 2% or 3% output-voltage accuracy target during very fast transients. Keep that target distinct from the example rail’s ±3% maximum DC+AC tolerance: one describes transient behavior, while the other is the stated rail tolerance.
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- Breadboard Power Supply Module:Output two road independent control, can switch over to 0 V, 3.3 V, 5 V；Input Voltage: 6.5-9V (DC) or 9V Battery. ;Output Voltage: ~3.3V/~5V;Output Current: 700mA(Max);With 9V battery snap power cable T-type 5.5x2.1mm connector;Fit for: MB-102 Breadboard; Arduino Board Solderless Breadboard etc.
- Alligator clip test leads:11.8-inch(300mm) jumper wire with an alligator clip on one end and female jumpers on the other forArduino, Raspberry Pi, Orange pi, wearable circuit projects or a breadboard experiment.
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- Package include:1pc 9V 1A Adaptor+1pc Breadboard Power Supply Module+1pc Battery Clip+2pcs Alligator clip test leads(Color random)+2pcs Banana Plug+5 Pin Male to Male DuPont cable+5 Pin Male to Female DuPont cable
How to evaluate the design on hardware
Start with the evaluation board and configuration tool
EVINAG-001-A is MPS’s Intel Agilex evaluation board for checking the reference-design specifications. Virtual Bench Pro 4.0 is the configuration resource MPS identifies for setting MPM3698 features to system requirements. Use the board and tool as an evaluation path, then confirm the actual settings and limits for your own FPGA and board.
Interpret the published load test as one workload
The June 7, 2024 MPS application note describes a test case with 80% core utilization, 80% DSP utilization, 30% M20K memory-block utilization, and a 15% toggling rate. Its reported core-rail setup uses 32 × 47 µF MLCCs plus four 0 µF polymer capacitors, and records a step-load/rate test. Those assumptions describe the published reference-design exercise; they are not universal FPGA utilization requirements or a capacitor prescription for other boards.
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- 【3.3V/5V SWITCHABLE OUTPUT】Toggle between 3.3V and 5V with a slide switch, up to 500mA per module (PPTC protected) — for powering Raspberry Pi, Pico W, ESP32, and other microcontrollers without extra adapters.
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- 【USB TYPE-C CONNECTIVITY】USB Type-C input (5V DC) for power from laptops, power banks, or USB hubs — reduces wiring for portable prototyping setups.
- 【LED POWER INDICATORS】Dual LEDs (red for 5V, blue for 3.3V) show active voltage status for safe operation and quick troubleshooting during DIY builds.
- 【COMPACT 3-PACK, FOR LOW-POWER LOADS】Plugs directly into standard solderless breadboard power rails. Suitable for logic circuits, sensors, displays, and single dev boards (up to 500mA). For high-current loads like motors or large LED arrays, use a dedicated supply. Pack of 3. Note orientation to avoid reversed polarity.
Repeat validation for your own operating profile
Use the FPGA power estimator and the intended firmware, clocks, and operating conditions to establish the expected load. Then check the implementation across its relevant operating range:
- Confirm rail current and headroom against expected and peak workload demands.
- Measure transient response, ripple, and voltage accuracy at the FPGA pins under representative load changes.
- Check regulator and board temperatures under sustained and changing loads.
- Verify power-up sequencing and the interaction between VID control, PMBus configuration, and AVSBus behavior.
- Reassess output capacitance, PCB layout, and thermal performance if the board differs from the evaluation design.
When to consider a different reference point
For comparison, Texas Instruments’ TIDA-050020 is an adjacent reference design: it uses smart power stages and PMBus telemetry for a 0.85 V, 200 A Xilinx UltraScale+ FPGA rail. It is a different FPGA platform and output voltage, so it is a benchmark for design approach, not a drop-in Agilex solution or a direct performance comparison.
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