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In November 2017, Andes Technology and Rockchip were named as participants in GlobalFoundries’ 22nm FD-SOI ecosystem, but in different roles: Andes had implemented 32-bit CPU IP on the process, while Rockchip said it planned 22FDX designs for Wi-Fi smart hardware and AI processors. The announcement described process adoption and design plans—not a retail product launch or proof that the specific projects later shipped.

What did “joining the FD-SOI club” mean?

The phrase referred to companies entering or participating in the design ecosystem around GlobalFoundries’ 22nm fully depleted silicon-on-insulator process, branded 22FDX. It did not mean that Andes and Rockchip were doing the same work, nor that either company had announced a finished consumer product.

Andes supplied CPU intellectual property (IP), which chip designers can license and incorporate into their own chips. Rockchip was described as a fabless system-on-chip (SoC) designer: it planned to develop its own chips using 22FDX. The November 2017 report also named Shanghai Fudan Microelectronics Group and Hunan Goke Microelectronics as participants, with connected devices and IoT among the common market interests.

How did Andes and Rockchip differ?

Company Role 22FDX engagement reported in 2017 Stated application area
Andes Technology CPU IP supplier Its 32-bit CPU cores had been implemented on GlobalFoundries 22FDX. Low-power embedded uses, including connected devices and sensor-related applications.
Rockchip Fabless SoC designer It planned 22FDX chip designs. Ultra-low-power Wi-Fi smart hardware and high-performance AI processors.

These distinctions matter: an IP implementation is evidence that a CPU core was adapted to a process, while a design plan describes intended chip development. Neither statement, by itself, establishes production volume, commercial availability, or customer adoption.

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Why consider FD-SOI for connected chips?

FD-SOI is a silicon-on-insulator manufacturing technology aimed at balancing low power with useful performance. Its body-bias flexibility can give designers another way to tune a chip’s behavior for its operating needs. Those characteristics made the process relevant to power-sensitive connected electronics, including wireless connectivity, networking, mobile devices, and battery-powered consumer products.

For Andes, low-power CPU IP was a natural fit with the small embedded functions used in connected products. The 2017 report said the company’s existing cores addressed touch-panel controllers, Wi-Fi, Bluetooth, FM, GPS, sensor hubs, wearables, and image processing. Andes president Frankwell Lin explained the market fit this way: “It happens that the end market for FD-SOI aligns to our product line pretty well.”

The report also discussed Andes’ next-generation N25 and NX25 cores, including the 64-bit NX25 and RISC-V support, in the context of collaboration with GlobalFoundries. Those details describe the company’s positioning at the time, not a claim about current product status.

For Rockchip, the named targets paired wireless smart hardware with AI processing. That indicates the company saw 22FDX as a possible platform for designs where power and performance both mattered; it does not establish that a particular chip reached market.

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Who made up the wider 22FDX ecosystem?

A process ecosystem includes more than the chip company and the foundry. It can involve substrate suppliers, design tools and services, IP providers, and fabless or OEM customers. In its 2017 Capital Market Day presentation, substrate supplier Soitec described a “complete FD-SOI ecosystem in motion,” reported more than 100 customer engagements, and listed Andes and Rockchip among fabless/OEM participants.

  • GlobalFoundries: the foundry associated with the 22FDX process.
  • Soitec: a supplier of FD-SOI substrates.
  • Andes and Rockchip: examples of fabless ecosystem participants, with different roles in IP and chip design.

Soitec said in 2017 that it planned to invest €40 million across fiscal years 2018 and 2019 to raise FD-SOI output to 400,000 300mm wafers per year. This was a stated production-capacity plan, not evidence in itself that the target was subsequently achieved.

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What is established—and what is not?

The November 2017 reporting establishes that Andes’ 32-bit CPU cores had been implemented on 22FDX and that Rockchip had announced plans for 22FDX designs in Wi-Fi smart hardware and AI processing. Soitec’s 2017 presentation supplies broader evidence of an active ecosystem and customer engagement.

The cited reporting does not establish later shipment volumes, revenue, or the eventual commercial status of those particular Andes and Rockchip projects. The announcements should therefore be read as historical process-enablement and design intentions, not as confirmation of current production or market share.

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