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Blacksmith is a 2021 ETH Zurich research project that showed how specially scheduled, non-uniform memory-access patterns could bypass undocumented in-DRAM Target Row Refresh (TRR) protections on every one of the 40 DDR4 DIMMs in the researchers’ test pool. The result demonstrates a weakness in the tested devices—not that every DDR4 module, every computer, or newer DRAM is vulnerable.

What Rowhammer and TRR mean

DRAM stores data in rows. Rowhammer is a disturbance effect: repeatedly activating selected rows can cause bits to change in nearby rows, called victim rows. If altered data is security-sensitive, such a bit flip can undermine assumptions made by software that relies on memory contents remaining intact.

Target Row Refresh, or TRR, describes in-DRAM mitigation approaches intended to recognize rows at risk and refresh likely victim rows before disturbance errors occur. Commodity-device implementations are proprietary and may differ, making their exact behavior difficult to inspect directly. Blacksmith therefore tested memory as a black box rather than depending on a public description of each device’s protection. ETH Zurich’s Blacksmith project page describes the work and its target.

How Blacksmith changed the attack pattern

Earlier Rowhammer patterns commonly activated aggressor rows uniformly. Blacksmith instead used a fuzzer to explore non-uniform schedules: the aggressor rows could be accessed with varying frequency, phase, and amplitude. In other words, it changed how memory accesses were distributed and timed; it did not introduce a new memory component.

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This distinction matters because a mitigation tuned to recognize regular, uniform behavior may not respond the same way to less regular patterns. Blacksmith searched for schedules that could cause bit flips despite the target device’s TRR. The paper discusses uniform single-sided, double-sided, and n-sided patterns as context for the different approach. The authors’ project materials provide the research background.

What the 40-DIMM result establishes

The Blacksmith authors reported bit flips on all 40 DDR4 DIMMs in their test pool. That is strong evidence that the TRR implementations present in those tested devices could be bypassed with the patterns they found. It is not a census of all DDR4 memory, a test of every product on the market, or proof that every later DRAM generation is susceptible. The researchers’ 2022 conference paper reports the experiment and its scope: Blacksmith: Scalable Rowhammering in the Frequency Domain.

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ETH Zurich’s 2021 institutional account likewise says the researchers tested 40 different DRAM memories and found a suitable pattern for each. This is the university’s summary of the same study, not a separate replication. ETH Zurich’s November 2021 report also explains the disclosure context.

Why bypassing TRR matters—and what it does not prove

Because protective logic may reside inside DRAM and may not be fully documented or visible to ordinary software, users and system designers cannot necessarily verify its behavior from public specifications alone. Blacksmith shows why security assumptions should not rely on attackers using only known, uniform Rowhammer patterns.

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The result does not, by itself, establish practical compromise of every computer containing a tested type of memory. The paper’s finding concerns bit flips under its research setup and tested DIMMs; the security consequences depend on the system, data, and conditions involved. ETH Zurich’s 2021 report quoted researcher Kaveh Razavi saying, “Unfortunately, the problem still hasn’t been solved.” In that report, the statement referred to the state of TRR mitigation at the time—not a verified description of every platform today.

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When the work happened, and what followed

ETH Zurich described the Blacksmith disclosure in November 2021 and said the team had shared its findings with manufacturers and technology companies earlier that year. The research was later published as a 2022 IEEE Security & Privacy conference paper.

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Rowhammer research continued after Blacksmith. ETH Zurich’s later research pages describe ProTRR, a proposed principled mitigation that its researchers say is compatible with DDR5 Refresh Management, and Phoenix, later work on DDR5 Rowhammer attacks and protections. These projects show that the topic continued to develop; they do not establish universal deployment of a fix or mean that Blacksmith’s original experiment tested DDR5.

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