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For a wide-input, high-power buck-boost design, calculate and verify more than the nominal operating point: the circuit’s limiting current, ripple, stability, and temperature can occur at different points in its input range. A useful worked example is Analog Devices’ inverting converter, which accepts 36–72 V and produces −48 V at 2 A. It bucks from 72 V down to 48 V and boosts from 36 V up to 48 V. That is one specific topology and design example—not a universal component recipe for every circuit called “buck-boost.”

Why the input range changes the design problem

A converter that spans both sides of its output voltage may operate in buck mode at one end of the input range and boost mode at the other. Those modes impose different demands on the power stage. In the Analog Devices example, the 72 V input is stepped down in magnitude to a 48 V output, while at 36 V input the converter must boost to that magnitude; the output is negative in both cases. The example’s 48 V × 2 A output is 96 W by calculation, not a separately published test result.

As the application note puts it: “To properly design the inverting buck/boost converter, it is important to consider the operation at each extreme of the input voltage: high line (highest input voltage) and low line (lowest input voltage).” The note’s example and calculations are in Analog Devices AN-2579.

Start by recording the actual requirements: minimum and maximum input voltage, output voltage and polarity, continuous and peak load, allowable ripple and transient deviation, switching frequency, ambient temperature and cooling, and fault conditions. Then calculate at minimum line, maximum line, and around the buck/boost transition. Do not assume one operating point is worst for every component.

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Find the worst case for each component

Output current alone does not establish whether the inductor or switches are adequately rated. In an inverting buck/boost power stage, inductor current reflects energy transfer between input and output, and its peak can exceed load current. Calculate peak and RMS currents for each relevant operating mode, then apply the controller’s limits and the component ratings under real operating conditions.

  • Inductor: Check peak current against saturation current and check RMS current, DCR, temperature rise, and core loss. A part’s headline current rating may not describe its usable rating in the intended thermal environment.
  • Switches: Check voltage and current stress as well as conduction and switching losses. For an integrated converter, use the controller’s documented operating and protection limits rather than treating the external inductor rating as the whole design.
  • Capacitors: Check voltage rating, effective capacitance under DC bias, ESR/ESL, and ripple-current capability. Nominal capacitance by itself is not enough.

The worst point can differ by quantity. In AN-2579’s 36–72 V to −48 V example, minimum inductance is calculated at high line, and the note identifies maximum inductor ripple current at high line. Output capacitance is checked at low line, where the example finds maximum output ripple. These are example-specific results, but they illustrate why each limit needs its own operating-point check.

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Choose inductance for ripple, losses, and response

Inductance affects current ripple and how quickly the converter responds when load changes. In AN-2579, the selected 47 µH Würth Elektronik inductor, part 7443634700, supports the note’s stated ripple requirements across its example’s input-line extremes. That selection is evidence for that design, not a recommendation for other voltage, current, frequency, or thermal conditions.

Texas Instruments documents a related tradeoff for its TPS631010: increasing inductance reduces ripple and conduction losses but slows load-transient response. Its datasheet also recommends 20% saturation-current headroom over the calculated value in its stated sizing procedure. The TPS6380x datasheet likewise recommends selecting saturation current 20% above its calculated boost-mode peak inductor current, which it evaluates at minimum input voltage. These are recommendations for those TI device families, not universal rules for every buck-boost topology. See the TPS631010 datasheet and TPS6380x datasheet.

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Size the output network using effective capacitance

A capacitor’s printed value can be substantially higher than its in-circuit capacitance, particularly for ceramic parts under DC bias. AN-2579 selects eight 10 µF, 100 V ceramic capacitors for its 48 V output example. Each part derates to 4.415 µF under 48 V DC bias, yielding 35.32 µF effective capacitance in total. The note identifies the parts as TDK C5750X7S2A106K230KB; the stated values are design-example data, not a general capacitor prescription.

When choosing an output network, calculate effective capacitance at operating bias and temperature, then verify ripple current, voltage rating, ESR/ESL, and transient performance. AN-2579 also notes that a hybrid electrolytic/ceramic approach can increase switching-frequency ripple because of ESR and ESL. Component type alone does not guarantee a lower-ripple result.

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Keep control bandwidth below the right-half-plane zero

The inverting buck/boost transfer function includes a right-half-plane zero (RHPZ), which constrains how quickly the control loop can respond while remaining stable. In AN-2579’s example, the RHPZ is lowest at low line and maximum load. The note recommends setting converter bandwidth to 25% to 33% of the RHPZ frequency. Treat that as guidance from this design context; controller architecture and operating conditions affect the appropriate loop design.

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Check losses, temperature, and the physical implementation

Estimate losses at the operating points that produce the highest current and switching stress. Include inductor DCR and core loss, switch conduction and switching loss, and capacitor losses where relevant. Then verify device and board temperatures under the actual airflow, copper area, enclosure, and ambient conditions. Simulation tools can help assess electrical and thermal behavior, but they do not replace validation of the finished board.

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Layout matters because parasitic inductance and resistance affect switching behavior, ripple, and EMI. Keep high-current switching loops controlled, follow the controller’s layout guidance, and account for tolerances and component derating. A design that meets calculations with ideal values may not meet them with real parts and physical interconnects.

Compare topologies against the same requirements

“Buck-boost” covers distinct circuits, including inverting and non-inverting four-switch designs. Ratings and operating details from one topology should not be transferred to another. If more than one topology can meet the requirement, compare them using the same input and output range, polarity, power, and operating conditions:

  • Peak and RMS current and voltage stress on switches and passives
  • Efficiency across the full operating range, not just one nominal point
  • Ripple, EMI, transient response, and behavior through the buck/boost transition
  • Loop stability, thermal burden, size, cost, and fault or reverse-current behavior

The cited sources do not provide a quantitative, same-conditions comparison of candidate topologies, so these are decision criteria rather than grounds for naming a universal winner.

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