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Repair common Windows errors and clear accumulated junk for a smoother, more stable PC - no reinstall needed.Free scan · no reinstallSMIC selected Kilopass one-time-programmable (OTP) non-volatile memory (NVM) IP for its 55-nm logic CMOS process, according to a June 28, 2011 announcement. The foundry-process enablement was intended to let chip designers embed data storage—such as trim data, boot code, and security keys—in system-on-chip designs; it was not a consumer product launch.
What did SMIC select Kilopass IP for?
The announcement described Kilopass OTP NVM IP as enabled for SMIC’s 55-nm logic CMOS process. Kilopass said the IP had already taped out on SMIC’s 65-nm process. The companies framed the 2011 news as an expansion of a partnership dating to 2005, with earlier work on SMIC 180-nm, 130-nm, and 90-nm logic CMOS processes. These partnership and tapeout details are from the companies’ announcement, not independent confirmation of production use. Kilopass announcement via GlobeNewswire
What was the embedded memory intended to store?
The companies identified mixed-signal trim data, boot code, and security keys as example uses. They cited multimedia processors, microcontrollers (MCUs), and RFID ICs as possible chip categories. The release does not identify customer products or establish that the IP was deployed in any named device.
How did Kilopass describe the technology?
Kilopass characterized its 2T antifuse technology as using standard CMOS logic without changes to masks, manufacturing steps, or equipment. That is the vendor’s description of its integration approach, rather than an independently verified analysis of SMIC’s manufacturing process.
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The 2011 release also made historical scale and qualification claims: Kilopass said its technology had been integrated into more than two billion ICs, described a 20-fold cell-size reduction from 180 nm to 28 nm, and said the technology had passed high-temperature operating-life (HTOL) and high-temperature storage-life (HTSL) standards at nodes including 40 nm. These figures and statements were reported by Kilopass; the announcement does not provide independent estimates or underlying test reports. Kilopass announcement via GlobeNewswire
What qualification milestone followed?
In a January 30, 2013 announcement hosted on SMIC’s website, the companies reported that Kilopass IP completed JEDEC three-lot qualification for SMIC 65-nm, 55-nm, and 40-nm low-leakage CMOS processes. The announcement described HTOL and HTSL testing and claimed the qualification supported more than 10 years of operation and data retention. Those are company-reported qualification claims; the underlying test reports are not included in the announcement. SMIC-hosted qualification announcement
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What the announcement does—and does not—establish
The 2011 milestone was a process-node enablement announcement for semiconductor designers considering embedded OTP storage. It provides no capacity, area, pricing, competing-IP comparison, or current availability information. Nor does it confirm a particular customer’s design win or commercial product deployment. Designers evaluating memory IP would need to assess fit for their target process variant, storage capacity and area needs, reliability evidence, security requirements, and manufacturing constraints with the foundry and IP provider.
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