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Why ARM introduced Thumb-2
Original Thumb used a compact 16-bit subset of ARM’s 32-bit instruction set. That could reduce program size, but developers faced a choice between Thumb’s code density and ARM’s broader functionality and performance. ARM introduced Thumb-2 core technology on June 16, 2003, as a second generation of Thumb designed to bring those benefits together. EE Times’ 2003 coverage quoted ARM Embedded CPU manager Richard Phelan describing it as a balance of code density and performance for embedded devices.
How Thumb-2 mixes instruction widths
Thumb-2 adds 32-bit Thumb instructions that can be intermixed with 16-bit instructions in the same program. A compiler or assembly programmer can use a 16-bit encoding when an operation and its operands fit the shorter form, and a 32-bit encoding when an instruction needs more room—for example, for a wider immediate, additional registers, richer addressing, or functionality unavailable in the short form. ARM says the extended instruction set covers most ARM functionality while retaining compact encodings where possible. ARM’s compiler guide describes Thumb-2 and its place in the architecture.
“Compression” is a useful shorthand for the effect on code size, but Thumb-2 is not a compressed file format. It is an instruction-set encoding scheme: the program contains instructions in mixed widths, which a supporting ARM processor executes.
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What changes compared with ARM and original Thumb
| Feature | ARM instruction set | Original Thumb | Thumb-2 |
|---|---|---|---|
| Instruction width | 32-bit instructions | Primarily 16-bit instructions | Mixed 16-bit and 32-bit instructions |
| Functional coverage | Broad ARM instruction functionality | Compact subset of ARM functionality | Most ARM functionality, using added 32-bit Thumb encodings |
| Conditional execution | Most ARM instructions can be conditional | Most Thumb instructions are unconditional | Provides conditional execution for following instructions with IT |
ARM’s Thumb-2 supplement characterizes its overall code density as comparable with Thumb, alongside performance levels associated with the ARM instruction set. That is an architectural aim, not a promise that every program will be smaller or faster in every implementation. ARM’s Thumb-2 Supplement explains the instruction-set design.
How the IT instruction handles conditional execution
Most Thumb instructions are unconditional, unlike the conditional execution available for most ARM instructions. Thumb-2 adds the IT (If-Then) instruction, which applies conditional execution to subsequent instructions. This restores an important control-flow capability while keeping the mixed-width Thumb encoding model. The exact instruction behavior and restrictions depend on the architecture documentation for the target; consult the ARM Architecture Reference Manual for architectural detail.
What ARM’s published Cortex-M3 figures mean
In its 2004 Cortex-M3 launch release, ARM claimed 26 percent less memory than pure 32-bit code and 25 percent better performance than 16-bit code alone. These are vendor launch comparisons for the Cortex-M3 announcement, not universal results: they should not be treated as independent benchmark findings or generalized across processors, compilers, and workloads. ARM’s Cortex-M3 launch release is the source for those figures.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.Where Thumb-2 appeared and what to check
ARM’s compiler guide documents Thumb-2 from ARMv6T2 onward. Early implementations included the ARM1156T2F-S and ARM1156T2-S cores; Thumb-2 was later used in Cortex processors, and the Cortex-M3 announcement made it a central feature of the Cortex family. Support and instruction details vary by architecture profile and core, so check the target’s architecture revision and processor manual rather than assuming every ARM processor supports the same Thumb-2 features. ARM’s historical filing describes Thumb-2 as a second generation of the Thumb instruction set introduced in 2003. ARM’s filing records the historical context.
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- For software targeting a particular processor: verify its architecture revision and core documentation.
- For code-size expectations: treat density as workload- and implementation-dependent, not a fixed percentage.
- For instruction-level detail: use ARM’s Architecture Reference Manual, Thumb-2 Supplement, and the technical reference manual for the specific processor.
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