A semiconductor fab is the specialized factory where a chip’s circuit structures are built on a wafer. It does this through repeated cycles of depositing or modifying materials, patterning selected areas with photolithography, removing or treating material, and inspecting the results. Fabrication makes the dies on the wafer; separate back-end steps test, cut, assemble, and package them into finished chips. The Semiconductor Industry Association (SIA) describes fabrication as the front-end stage of the semiconductor value chain.
What happens inside a semiconductor fab?
A fab—short for fabrication facility—is the industrial site for front-end wafer manufacturing. A chip design is translated into structures formed on a wafer, producing many individual integrated-circuit dies at once. The fab is one stage in a larger chain: design comes before fabrication, while assembly, testing, and packaging follow it.
There is no single recipe used for every chip. The specific materials, tools, sequence, and number of layers depend on the design and manufacturing process. The recurring idea is to build structures in layers by adding, shaping, selectively removing, or electrically modifying material, then checking that each stage is within specification.
How does a fab turn a wafer into circuit structures?
Think of the process as repeated stencil work. A pattern is transferred to a light-sensitive coating on the wafer, and that pattern guides later processing. The cycle is repeated as needed to build up the chip’s devices and interconnections.
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- Prepare and coat the wafer. The wafer surface is cleaned and prepared, then coated with photosensitive material called resist.
- Expose a pattern. A mask or reticle carries a circuit pattern. An optical projection system transfers a reduced image of that pattern onto the resist. ASML’s lithography explainer describes how this optical pattern transfer works.
- Develop the resist. Development removes selected portions of the resist, leaving a patterned layer. The remaining resist protects some areas while later operations act on exposed areas.
- Add, remove, or change material. Deposition adds thin films; etching removes selected regions; and doping changes electrical properties in selected parts of the wafer. Metallization forms conductive interconnections between circuit elements.
- Clean, flatten, and inspect. Cleaning removes residues, while planarization helps create a flatter surface for building additional layers. Metrology and inspection check dimensions, alignment, and process results.
- Repeat for the next structures. The fab applies further patterning and material-processing cycles wherever the design requires them. These are process families, not a universal fixed sequence in which every named operation appears on every chip.
Photolithography does not carve a finished chip out of silicon. It transfers patterns into resist so that subsequent steps can selectively process the wafer. Different layers may use different lithography approaches; deep ultraviolet (DUV) and extreme ultraviolet (EUV) are not used identically across every layer or every chip. ASML’s chipmaking overview discusses the broader process.
How many times are the steps repeated?
The count varies with the device and with what is included in a process flow. SIA’s Stage 3 overview says manufacturing steps repeat several hundred times. In its 2026 testimony, SIA describes flows with 8–20 patterned layers and, in some cases, up to hundreds. These figures describe different scopes; neither should be read as a universal layer count for every chip. The testimony also characterizes semiconductor device fabrication as involving well over 1,000 precise steps, not a fixed count for every product or facility. SIA’s front-end manufacturing overview and its 2026 testimony provide those descriptions.
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Why does fabrication take place in a cleanroom?
Small particles and contamination can interfere with structures being formed on the wafer, so fabs tightly control the environment around production tools. ASML describes cleanrooms that control air quality and temperature, filter and recirculate air, and require special garments to reduce particles introduced by people. These are vendor descriptions of cleanroom practices, not a single specification that applies to every fab. ASML’s overview explains the cleanroom context.
What happens after the wafer leaves the fab?
Front-end fabrication creates circuit structures across the wafer, but it does not produce a ready-to-use packaged chip. The wafer is electrically tested, and individual dies are separated by dicing. A selected die is attached to a package, connected electrically, and encapsulated for physical protection. Further testing checks the packaged device before it is used as a component in a larger product. SIA’s back-end overview describes these steps. A packaged chip can then be integrated into a circuit board; the fab itself does not make a finished phone or computer.
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Who owns or operates a fab?
Companies use different business models to divide design and manufacturing responsibilities. These labels describe who does the work, not different wafer-processing recipes.
| Business model | Who designs? | Who manufactures? |
|---|---|---|
| Integrated device manufacturer (IDM) | The company designs its chips. | The company manufactures chips in its own facilities. |
| Foundry | Customers provide chip designs. | The foundry manufactures chips for those customers. |
| Fabless company | The company focuses on chip design. | It outsources fabrication, often to a foundry. |
ASML’s overview of how microchips are made explains these industry roles.
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Why are fabs so expensive to build?
A fab combines specialized manufacturing equipment with facilities engineered to support tightly controlled production. In its 2026 testimony, SIA estimated that investment for a leading-edge fab spans about $20–25 billion across construction and manufacturing equipment. That is an attributed estimate, not a current quote or a universal cost: the figure is specifically for a leading-edge fab. The same testimony says the U.S. semiconductor industry reinvests an average of 20% of revenue in R&D; that figure applies to the U.S. industry, not to every company or fab. SIA’s 2026 testimony provides both figures.
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