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Rapidus is earlier in its manufacturing ramp than TSMC, Samsung, and Intel. The Japanese company says its Hokkaido pilot line has operated since April 2025 and targets mass production of 2nm chips in 2027. By comparison, TSMC reports N2 volume production from Q4 2025, Samsung lists SF2 mass production as started in 2025, and Intel says 18A entered production in 2025. Those are company-reported milestones, not proof that the four processes have equal output or maturity.

How the reported production timelines compare

The clearest current comparison is where each company says it is in the manufacturing schedule. As of October 7, 2026, Rapidus describes a pilot line and a future mass-production target; the other three report production milestones for their respective processes.

Manufacturer Process label Reported status How to read the milestone
Rapidus 2nm program Pilot line in Chitose, Hokkaido, operating since April 2025; mass production targeted for 2027 (Rapidus). The 2027 date is a target, not a reported start of mass production.
TSMC N2 Volume production reported from Q4 2025 (TSMC). A company-reported volume-production milestone; it does not establish the output or yield achieved.
Samsung SF2 Mass production listed as started in 2025 (Samsung). A company-reported start; it is not directly comparable to another company’s definition of production.
Intel 18A Production reported to have begun in 2025 (Intel). A reported production milestone, not a common measure of commercial scale.

On schedule alone, Rapidus is the later entrant: its stated mass-production goal follows the 2025 milestones reported by the other three companies. The dates do not show how much each process can produce, how many customers are using it, or how mature its manufacturing is.

What the process names do—and do not—tell you

“2nm,” “N2,” “SF2,” and “18A” are company-specific process labels. They should not be treated as a shared measurement system in which the same number guarantees the same transistor dimensions, performance, power use, or manufacturing cost. The available company statements establish each company’s own process naming and milestone; they do not provide a common independently audited comparison.

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  • Samsung identifies SF2 as its second-generation MBCFET, or gate-all-around, process.
  • Rapidus describes a 2nm manufacturing program and a single-wafer processing approach.
  • TSMC identifies its process as N2, while Intel identifies its leading-edge process as 18A.

These descriptions are not enough to rank chip speed, energy efficiency, yield, wafer cost, or customer access. A sound comparison of those measures would require equivalent products, test conditions, and comparable data from all four manufacturers; the cited company milestones do not supply that evidence.

How Rapidus’s business position differs

Rapidus is a new Japanese manufacturer seeking to establish advanced logic-chip design and manufacturing in Japan. The Government of Japan’s 2024 background account describes the company’s founding purpose and its partnership with IBM on 2nm technology. That explains the project’s origins and collaboration context; it is not a current independent assessment of process readiness.

The other three operate from established semiconductor businesses: TSMC is a dedicated foundry, Samsung’s foundry operation sits within Samsung, and Intel has a foundry business within Intel. These institutional differences matter when comparing a new manufacturing entrant with companies that already have established operations, but they do not by themselves show which firm will win more customers or deliver better chips.

Rapidus’s funding and ecosystem plans

Funding announcement

Rapidus announced a 267.6 billion yen funding round on February 27, 2026, involving the Japanese government and private-sector companies. The amount refers to that specific announced round. It is not a figure for total project cost, all government support, or confirmed funding sufficient to build and operate commercial-scale capacity.

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Rapidus CORE and design partners

On October 5, 2026, Rapidus announced Rapidus CORE and an initial Design Solution Associates initiative. This indicates that the company is developing an ecosystem around its manufacturing plans. The announcement does not establish that customer design flows, intellectual-property options, or support already match the breadth of longer-established foundries.

What Rapidus says is distinctive about its approach

Rapidus presents short turnaround times and single-wafer processing as features of its intended manufacturing approach. These are company-stated strategic aims, not measured evidence of a speed, cost, or yield advantage over TSMC, Samsung, or Intel. Whether they become a practical advantage depends on manufacturing performance and customer needs, which are not resolved by the milestones and announcements described here.

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What this comparison can establish

The available information supports a comparison of stated process names, reported production stages, and Rapidus’s publicly announced funding and ecosystem efforts. It does not support a definitive ranking of the manufacturers on yield, wafer capacity, wafer price, customer commitments, or benchmark performance. Until comparable figures are published, the most precise conclusion is that Rapidus is building toward a 2027 mass-production target while the three established competitors report 2025 production milestones.

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