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What the “memory wall” means for AI inference
AI inference requires processors to access model parameters and other data repeatedly. A chip can perform calculations quickly yet still be held back if it cannot move the needed data to and from memory fast enough. That mismatch is often called the memory wall.
The trade-off is between capacity and bandwidth. SRAM located on a processor can move data quickly, but there is limited room for it. High-bandwidth memory (HBM) can provide more capacity, but access bandwidth can still constrain how effectively an accelerator serves large models. Volantis argues that connecting compute to pooled off-chip memory over an optical fabric could increase capacity and bandwidth together.
That is the company’s architectural thesis, not a demonstrated outcome. Optical links may make it practical to place memory farther from compute, but the full system still has to deliver useful sustained bandwidth, acceptable latency and power use, and reliable integration with its memory and software.
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How Volantis says A-1 will use photonics
Volantis describes A-1 as an inference system centered on an optical fabric and photonic interposer. The company says its approach uses custom integrated micro-VCSELs and optical connections that differ from conventional fiber-based approaches. Those are descriptions of the planned design; public reporting does not establish that a complete A-1 system has been built or independently tested.
The Register reported on Oct. 5, 2026, that A-1 aims to provide more than 10 TB of memory and up to 240 TB/s of bandwidth. Volantis also described design targets of supporting models exceeding 20 trillion parameters and delivering up to 10,000 tokens per second per user in its Oct. 1, 2026, funding announcement. These are separate targets, not measurements from a common benchmark, and the announcements do not specify enough test conditions to compare them directly with shipping GPUs or other accelerators.
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Volantis’ homepage also advertises more than 30 times the bandwidth and more than 50 times the memory size. Those are marketing claims; the available information does not establish their comparison baseline or provide independent test results.
What is—and is not—established about the performance claims
The figures describe what Volantis hopes to build, not what customers can buy or benchmark today. In particular, a headline bandwidth number alone does not show how fast an application will run: workload, latency, memory access patterns, software, and sustained rather than peak performance all matter.
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The Register reported two additional targets on Oct. 5, 2026: 1 picojoule per bit per 24 Gbps lane and about 20 kW for total system power. They are not measured product results. Without a working system and a disclosed test methodology, they do not establish A-1’s realized energy efficiency or how its power use compares with other systems.
There are also no independently comparable results for cost per token, latency, sustained bandwidth, or performance across specific AI workloads. Any comparison with GPUs, TPUs, or other photonic interconnect designs should wait for measurements made under comparable conditions.
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Development status and remaining engineering work
The Register reported that Volantis was targeting a working minimum-viable-product prototype in 12 to 18 months. That is a prototype goal, not a volume-production schedule. The report also described a gap between small optical demonstrators and a product-like system, which must integrate licensed intellectual property and multiple system components.
Important implementation details remain undisclosed in the cited announcements and reporting. The specific memory technology for A-1 had not been identified in The Register’s coverage, and its memory supplier, production partners, measured performance, and production date are not established there. Power efficiency is also an open question.
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Volantis CEO Tapa Ghosh told The Register that the company plans to license other IP while concentrating its differentiation on the optical interposer, saying it is taking on substantial risk with the interposer and integration. CTO Roy Meade characterized conventional SerDes approaches as a “fat pipe point-to-point mentality.” These comments explain the company’s strategy; they are not independent confirmation that the proposed architecture will meet its targets.
Funding announcements and the “Altman-backed” label
Volantis announced an $88 million Series A co-led by Lachy Groom and Abstract Ventures on Oct. 1, 2026. In a separate post dated Sept. 29, 2026, the company said it had raised $97 million to date, including its new round. Those are statements made on different dates and should not be collapsed into one funding figure or treated as independently reconciled totals.
The announcements and reporting cited here do not identify Sam Altman as an investor or establish that he backed Volantis. Accordingly, “Altman-backed” is not substantiated by the available information; the confirmed funding detail is the Series A and co-leads named by Volantis.
What to watch for next
The most useful evidence will be a working, product-like system and transparent measurements that show whether optical connectivity improves memory capacity and bandwidth without unacceptable penalties elsewhere. When results become available, readers should look for:
Quick Recap
- Memory type, usable capacity, and how much bandwidth is sustained under real inference workloads.
- Latency and performance on named models, including the workload and measurement method behind any tokens-per-second figure.
- Power measurements for both the optical links and the complete system, with test conditions stated.
- Software and licensed-IP integration details, plus evidence that the design can scale beyond small demonstrators.
- A clear distinction between prototype milestones and plans for production or customer availability.
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