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India is reportedly considering inviting Taiwan’s Industrial Technology Research Institute (ITRI) and Singapore’s Agency for Science, Technology and Research (A*STAR) to set up semiconductor training branches in the country. The proposal is not a confirmed partnership: Business Standard reported it on October 6, 2026, citing unnamed sources and officials, and neither institute is reported to have committed to opening a centre.
What India is reportedly considering
According to Business Standard’s October 6, 2026 report, the Ministry of Electronics and Information Technology (MeitY) may invite ITRI and A*STAR to establish semiconductor training centres in India. Germany’s Fraunhofer-Gesellschaft is mentioned as another possible invitee. The report describes possible invitations, not signed agreements or accepted offers.
MeitY is reportedly considering fully funding the centres’ setup. The proposed aim is to develop semiconductor engineers and shop-floor workers for allied components, with training intended to take learners from foundational instruction toward job readiness. Locations, course levels, learner numbers, credentials, launch dates and the scope of any funding have not been reported.
Why the proposal matters to India’s chip workforce
The proposal is framed as a response to the need for a steady pipeline of trained workers as semiconductor fabrication and packaging facilities are built or approach commercial operation. An unnamed senior government official quoted by Business Standard described the goal as creating a pool of engineers and shop-floor workers for allied components who could be hired directly from the institutes.
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Business Standard places the possible centres within ISM 2.0’s talent-development pillar. The newspaper reported that the Union Cabinet approved the second phase earlier in 2026, with an approximately 1.27 trillion budget, and described six focus areas:
- Semiconductor design
- Machines and materials
- Additional fabrication units
- Semiconductor packaging
- Research and development
- Talent development
The report does not specify the budget currency or provide the underlying Cabinet decision or programme documents, so the figure should not be read as a fully documented appropriation here.
Training centres would not replace hands-on access to chip plants
The report says some practical instruction would still require access to a working fabrication facility or an assembly, testing, marking and packaging (ATMP) plant. A classroom or training branch can build foundational knowledge and prepare learners, but the proposal as described does not remove the need for practical experience with operating production equipment.
That distinction will matter if the plan advances: the centres’ usefulness for job readiness will depend in part on how learners gain supervised access to live fabs and packaging plants, not only on the curriculum delivered at the branches.
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What is known about the possible institute partners
The report identifies ITRI, A*STAR and potentially Fraunhofer-Gesellschaft as candidate partners, but gives no confirmed training programme or division of responsibilities.
| Institute | What the report establishes | What remains unconfirmed |
|---|---|---|
| ITRI (Taiwan) | Named as a possible invitee. Business Standard reports that ITRI said it follows developments in India’s semiconductor industry and talent development and maintains exchanges with international partners. It added that it would communicate further cooperation plans or concrete developments at an appropriate time. | No accepted invitation, centre, curriculum, location or launch date is reported. |
| A*STAR (Singapore) | Named as a possible invitee. | Business Standard said A*STAR did not respond to its queries; no commitment or programme details are reported. |
| Fraunhofer-Gesellschaft (Germany) | Named as another possible invitee. Business Standard reported that it has 75 global branches. | No invitation, acceptance or India-centre plan is confirmed in the report. |
How the proposal fits the reported workforce targets
Business Standard reported that a government target to train 85,000 semiconductor engineers over ten years starting in 2022 had been achieved by 2026. It also reported a second-phase target of 100,000 engineers over the next six years. These are figures reported by the newspaper; the article does not include primary programme documents or independent verification of the totals. The proposed branches are presented as one possible contribution to talent development, not as a confirmed mechanism for meeting either target.
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What to look for if invitations become a formal programme
A future announcement would need to clarify details that the current report does not establish:
Quick Recap
- Whether invitations were formally sent and which institutes accepted.
- Where centres would operate, when they would open and how many learners they would admit.
- Which roles and learner groups the courses would serve, and what credentials graduates would receive.
- How classroom instruction would connect learners to working fabs and ATMP plants for practical training.
- Whether government funding covers only initial setup or also ongoing operations, equipment and training.
- Whether the arrangement is a signed partnership with defined responsibilities or remains a proposal.
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