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Analog Devices’ Signal Chain Power (SCP) platform helps engineers turn supply requirements into a trial-ready power tree: the SCP Configurator proposes combinations of regulator evaluation boards, and compatible boards can be connected for system-level evaluation. It is an architecture aid, not a substitute for checking noise, efficiency, cost, size, and behavior in the circuit you actually intend to power.

What the SCP platform does

Signal-chain systems often need several rails with different voltages, polarities, current demands, and noise constraints. A designer can build a supply using bench equipment while optimizing a circuit, but that approach does not itself provide a compact, repeatable board-level power architecture. Analog Devices’ SCP platform pairs modular power-management evaluation boards with the SCP Configurator, a graphical tool that proposes board-level building blocks from application requirements. The manufacturer’s overview, published December 1, 2021, describes the platform for instrumentation, test and measurement, and industrial automation work: Analog Devices: A New, Easier Way to Create Power Solutions for Signal Chain Systems.

The useful distinction is between choosing an architecture and validating it. The Configurator can narrow the choices and make a candidate power tree easier to assemble; it cannot establish that the resulting supply is quiet enough, efficient enough, or otherwise suitable for every signal chain.

How to use the SCP Configurator

  1. Enter the application requirements. Provide the input voltage, each required output voltage, anticipated load current, and whether a rail has a low-noise requirement.
  2. Review the proposed power tree. The tool presents a graphical architecture and board alternatives based on the entered needs. Treat this as a starting point for evaluation, not as a guarantee of optimal performance.
  3. Check the implementation details. The generated report can identify interconnect accessories and link to board documentation. Verify that the selected boards meet your required polarity, voltage range, load, and other system constraints.
  4. Assemble and evaluate the candidate stack. The common board form factor and defined input/output header locations and polarity are intended to support combinations. Confirm the current documentation for the specific boards before connecting them.
  5. Measure in the target circuit. Compare relevant signal-chain behavior with the candidate power arrangements. A low-noise label or a tool recommendation alone does not answer whether the supply is quiet enough for a particular converter and application.

What the hardware building blocks provide

The 2021 platform description covers switcher and LDO boards, breakout and reintegration boards, a through board, a filter board, and single-input and single-output boards. The switching options include step-up, step-down, step-up/down, inverting, and dual-output boost/inverting topologies; positive and negative LDOs can provide post-regulation. Examples pictured or named include the SCP-ADP5070-EVALZ dual DC-to-DC converter evaluation board and SCP-LT3045-1-EVALZ LDO evaluation board.

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Other described capabilities include accessible pads for component changes, an optional SMA clock input for synchronization on supported switchers, sequencing headers, and VIOC tracking. VIOC tracking is intended to reduce LDO dissipation while maintaining PSRR performance. These are capabilities described in the manufacturer’s 2021 article; consult the documentation for the particular board and design to confirm what is supported.

Choose each rail by its constraints, not by a blanket preference

The platform makes it practical to compare a switcher plus LDO, a switcher alone, or an LDO alone where those options fit a rail. The right choice depends on the application rather than a universal rule that one regulator type is always quieter or better.

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  • Noise and signal performance: Evaluate noise in the actual signal chain, including the converter and its surrounding circuitry. The question is not simply whether one supply is nominally quieter, but whether the difference changes application performance.
  • Efficiency and dissipation: Consider conversion losses and heat across the intended operating conditions. Post-regulation can affect both noise and power dissipation.
  • Voltage, polarity, current, and sequencing: Confirm each rail’s required output, load current, polarity, and sequencing needs against the candidate boards.
  • Size and cost: Compare the assembled solution’s footprint and cost as well as its electrical performance. The 2021 article does not establish current board prices or availability.
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What the CN-0513 and AD4020 demonstration shows

To illustrate the comparison, the Analog Devices authors evaluated supply-board combinations with CN-0513, a data-acquisition design using the AD4020 SAR ADC. The official CN-0513 reference-design page identifies it as a 20-bit, 1.8 MSPS, ±2.5 ppm INL low-drift, high-accuracy data-acquisition solution.

For their example, the authors used a nominal 9 V input and specified these rails and loads: 1.8 V VDD at a maximum of 1.10 mA; 3.3 V VIO at a maximum of 0.30 mA; +5.5 V at 20.0 mA; and −1.0 V at 20.0 mA. They state that the PGIA current estimate includes two ADA4627-1 amplifiers at up to 7.8 mA each, plus an allowance for other circuitry. These are requirements for the reported example, not general requirements for an AD4020 design or other signal chain.

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The test applied a 1 kHz sine input and checked the ADC’s sampled FFT. The table reproduces the values reported in the December 1, 2021 Analog Devices article. Each cell is ordered as switcher + LDO / switcher only / LDO only; the results are from that described evaluation, not an independently reproduced benchmark.

Rail Dynamic range (dB) SFDR (dB) SNR (dB) THD (dB) SINAD (dB)
+5.5 V (+VS) 98.165 / 98.434 / 98.362 120.26 / 120.07 / 120.4 97.39 / 97.66 / 97.59 −119.67 / −119.5 / −119.76 97.36 / 97.63 / 97.56
1.8 V VDD 98.165 / 98.301 / 98.347 120.26 / 119.46 / 119.55 97.39 / 97.53 / 97.57 −119.67 / −118.75 / −118.97 97.36 / 97.49 / 97.54
3.3 V VIO 98.165 / 98.119 / 98.152 120.26 / 120.65 / 120.16 97.39 / 97.34 / 97.38 −119.67 / −120.12 / −119.69 97.36 / 97.32 / 97.35

The authors characterize the measurements as comparable overall, while noting that differences can still affect application performance. The values vary by rail and metric, so they do not establish a universal winner among the three configurations. The negative rail was evaluated only with the default suggestion: its requested output was below the minimum output voltage of the negative switcher boards, and the negative LDOs could not be connected to the positive input voltage.

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What to verify before choosing a board combination

  • Confirm the board’s output range, polarity, current capability, and input limits against the application’s operating conditions.
  • Check how rails are connected and whether sequencing or synchronization is needed for the design.
  • Use measurements relevant to the signal chain’s performance requirements, rather than treating the demonstration’s FFT results as specifications for other hardware or operating conditions.
  • Review the current board documentation for component options and capabilities; the overview article dates from 2021.

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