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An FP8 tensor at the input or output of an XLA computation does not prove that the compiled convolution uses FP8 arithmetic. XLA’s current NVIDIA GPU compiler source describes a pass that can rewrite an FP8 cuDNN convolution fusion to BF16 when cuDNN has no usable FP8 plan for the target GPU and the BF16 replacement is supported. Whether this applies depends on the GPU, convolution configuration, and software versions.
The “half” measurement and the article title’s claimed one-line fix cannot be independently verified: the original article’s body, code, environment, and benchmark are unavailable. The documented compiler behavior supports a more precise takeaway: check the compiled path for your exact workload rather than infer it from graph-boundary dtypes.
Why an FP8 convolution may not execute as FP8
XLA lowers computations for a particular GPU and software stack. For NVIDIA GPUs, the available cuDNN execution plans depend on the target and convolution configuration. XLA’s current GPU compiler source includes a ConvFp8Fallback pass that rewrites FP8 cuDNN convolution fusions to BF16 when cuDNN has no FP8 plans for that target. The pass is positioned after convolution-fusion rewriting and before autotuning enumerates plans. OpenXLA compiler source
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The change description says the pass probes cuDNN at compile time and rewrites only when the FP8 plan is unsupported and the BF16 replacement is supported. This fallback can preserve compilability, but it is not evidence that every unsupported FP8 convolution on every GPU or cuDNN release will use the same path. The description gives grouped convolutions on sm_120 with certain channels-per-group configurations as examples; those implementation details are revision-specific. OpenXLA change description
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FP8 plan available versus unavailable
When cuDNN has an applicable FP8 plan, this particular fallback condition is not met. When it does not, XLA may use the described BF16 replacement if that replacement is supported. Plan availability is specific to the compiled target and convolution parameters—not just the nominal FP8 dtype in model code.
What “fallback” means here
The cited convolution pass describes FP8-to-BF16 fallback, not a general rule that all unsupported FP8 convolutions run in f32. Other operations and compiler paths can behave differently. Keep the reported f32 claim distinct from the behavior directly documented for this pass.
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What FP8 tensor types do—and do not—tell you
An FP8 type in HLO at a convolution boundary establishes the graph’s boundary type. By itself, it does not identify the arithmetic type inside a fused operation, the cuDNN plan selected, or the implementation executed by the GPU.
A separate OpenXLA issue about a particular FP8 matmul scaling regression shows why boundary types can mislead: the reported HLO converts FP8 operands to BF16, performs a BF16 dot, then converts the result back to FP8. That is a matmul example, not proof that convolutions generally follow the same path. OpenXLA issue #17887
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XLA’s FP8 RFC provides broader design context: it describes recognizing scaled dot and convolution patterns for GPU-library rewrites, while noting that operations without appropriate native support may use higher-precision arithmetic. The RFC is not a guarantee that a particular shape, GPU, or current software release has an FP8 convolution plan. OpenXLA FP8 RFC
How to check the compiled convolution in your setup
- Record the full workload and environment. Note the XLA version and whether it is used through JAX or TensorFlow, plus CUDA and cuDNN versions, GPU model and compute capability, input and filter shapes, strides, padding, group count, and precision configuration. Plan availability can depend on these details.
- Dump compiler IR across passes. An OpenXLA discussion suggests setting
XLA_FLAGS=--xla_dump_hlo_pass_re=.*to inspect HLO changes. Confirm the accepted flag syntax for your installed build, then compile the exact workload and retain the relevant pass dumps. OpenXLA discussion - Trace the convolution through the dumps. Look for conversions around the convolution, the resulting convolution or fusion instructions, and any change in operand or result types. Compare the IR before and after relevant lowering passes rather than relying only on the initial graph.
- Check backend implementation evidence. Use the compiler’s final output and available execution diagnostics to establish which implementation or kernel was selected. An intermediate HLO type alone may not identify the final library plan.
- Separate dtype findings from performance findings. A BF16 rewrite would establish a precision-path change, not the speed impact or the fraction of a model affected. Measure performance on the same workload and environment if those are the questions you need to answer.
What is—and is not—verified about the “half” claim
The accessible DEV Community listing identifies Yehor Cherednichenko’s article with the title “Half of my FP8 convolutions were silently running in f32 – a one-line XLA fix” and dates it Sep 17. Its article body was not retrievable, so the exact fix, hardware and library versions, measurement method, denominator, and benchmark cannot be checked. The word “half” is therefore a claim in the title, not an independently verified statistic. DEV Community compiler topic listing
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The available XLA sources establish that an FP8 convolution can be rewritten to BF16 under a documented set of plan-support conditions. They do not establish that the title author’s convolutions ran in f32 or identify a one-line change that fixes the author’s case. Verify the path in your own compiled executable before assigning a dtype or performance explanation.
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