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1Repair Windows errors before they cause bigger problems2Scan for outdated or missing drivers - takes under a minute3Clear out junk files and repair common Windows errorsWeebit Nano and DB HiTek demonstrated edge-AI gesture recognition running on silicon that integrated Weebit’s ReRAM memory IP into DB HiTek’s 130nm BCD process. The PCIM 2025 example used a 1Mb ReRAM module, with Embedded AI Systems Pte. Ltd. (EMASS) collaborating on the application. It showed an integrated-silicon use case—not a consumer product or an independently benchmarked comparison with other memory technologies.
What the Weebit Nano ReRAM demo showed
Announced on 30 April 2025, the demonstration was presented at PCIM 2025 in Nuremberg, held 6–8 May. Weebit Nano and foundry partner DB HiTek integrated Weebit’s resistive random-access memory (ReRAM) non-volatile memory IP into DB HiTek silicon made using its 130nm Bipolar-CMOS-DMOS (BCD) process. The demonstration ran a gesture-recognition edge-AI application on a standard 1Mb ReRAM module; EMASS collaborated on that application. Weebit later described the demo chip as fully functional.
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In this context, “IP” means a memory design integrated into a chip process, not a standalone memory device for consumers. The demonstration is evidence that the integrated silicon ran the stated application. The cited announcements do not provide an independent performance benchmark or a measured comparison against another memory type. Weebit Nano and DB HiTek’s 30 April 2025 announcement describes the demonstration; Weebit’s 31 July 2025 report later called the silicon demo chip fully functional.
What ReRAM IP means for a chip
ReRAM, or resistive random-access memory, is a form of non-volatile memory: it is designed to retain data without continuous power. Here, Weebit supplied the memory IP and DB HiTek provided the chip-manufacturing process into which it was integrated. The application illustrates one possible role for embedded non-volatile memory in an edge-AI chip, where memory is part of the silicon rather than a separate consumer storage product.
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The demonstration alone does not establish how the module compares with other memories on speed, power, density, endurance, retention, or cost. DB HiTek’s CEO described the IP as “cost-effective and high-density” in the joint announcement; that is a company statement, not a measured result reported for this demo.
Qualification and customer progress
The status changed after the PCIM announcement. At launch, full qualification in DB HiTek’s 130nm BCD process was expected later in 2025. The module was available to select DB HiTek customers for design prototyping, and the announcement said it would be added to the foundry’s Process Design Kit after qualification. In July 2025, Weebit said qualification remained on track and cited testing that included high-temperature operating life, program/erase endurance, and data retention.
In a 5 January 2026 report, Weebit said DB HiTek qualification against JEDEC non-volatile memory standards had been achieved in December 2025. The company said the qualification used silicon dice selected from three independent wafer lots. This is a company-reported qualification milestone, not an independent evaluation of the demonstration’s performance. Weebit’s January 2026 announcement gives its account of the milestone.
By 4 May 2026, Weebit reported that two product customers had taped out chip designs incorporating its ReRAM module. One was Overlord Labs, for a smart battery management system at DB HiTek. Weebit also said a second customer had received an initial product prototype that functioned as expected, including its ReRAM. Both customers planned further testing, characterization, and qualification; Weebit estimated that process could take 12–18 months. These are product-development steps, not evidence of mass production. The May 2026 customer update reports those milestones.
How to interpret the milestones
| Milestone | What it establishes | What it does not establish |
|---|---|---|
| PCIM 2025 demonstration | Integrated DB HiTek silicon ran the described gesture-recognition application using a 1Mb ReRAM module. | An independently measured performance advantage or commercial product availability. |
| DB HiTek qualification, reported January 2026 | Weebit said qualification against JEDEC NVM standards was achieved in December 2025 for the 130nm BCD process. | Customer products had completed their own testing or were in mass production. |
| Customer tape-outs and prototype, reported May 2026 | Two customer designs had reached tape-out; one initial prototype reportedly functioned as expected, including ReRAM. | Completed customer qualification, volume manufacturing, or broad market availability. |
For readers asking whether the demo was already qualified, the timing matters: qualification was still prospective in April 2025, then Weebit reported it achieved in December 2025. That foundry-process milestone is distinct from the additional testing and qualification planned for customer products.
Weebit’s resources page lists a video titled “Live Demo of DB HiTek Silicon with Weebit ReRAM.” The company’s ReRAM technology overview provides its broader description of the technology.
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