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Silvaco Group and Fraunhofer ISIT announced an R&D collaboration on June 24, 2025, to support development of next-generation gallium-nitride (GaN) devices. The plan pairs Silvaco’s power-device design and simulation tools with ISIT’s 8-inch post-CMOS prototyping environment. It is a development partnership, not a reported production contract: the announcements do not state a budget, production commitment, device results or IP-ownership terms.
What did Silvaco and Fraunhofer ISIT announce?
The companies said ISIT would use Silvaco’s Power Devices Solution and design-technology co-optimization (DTCO) flow to develop and evaluate power and sensor devices. The work focuses on next-generation GaN, while the described environment also supports MEMS process development.
Fraunhofer ISIT develops and manufactures customer-specific power-electronics and microsystems components. In this arrangement, Silvaco contributes electronic design automation software and ISIT contributes an applied research and fabrication setting in which process modules and device concepts can be prototyped and evaluated.
The announcement identifies Victory TCAD, Utmost IV, SmartSpice and Victory Design of Experiments (DOE) as tools in the workflow. It does not assign a detailed, separate task to every product, so their individual responsibilities should not be inferred from the release alone.
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How is the DTCO workflow intended to help develop GaN devices?
DTCO brings device and process choices into consideration alongside design decisions, rather than treating them as isolated stages. For this collaboration, the stated purpose is to evaluate new process modules and device concepts in ISIT’s post-CMOS environment and accelerate prototyping. The releases describe an intended workflow; they do not report a measured reduction in development time or completed device performance.
| Tool | What the announcement establishes |
|---|---|
| Victory TCAD | Named as part of the platform ISIT will use for DTCO on power and sensor devices; the release does not detail its specific tasks in each project. |
| Utmost IV | Named as a tool in the collaboration’s workflow; a distinct role is not specified in the announcement. |
| SmartSpice | Named as a tool in the collaboration’s workflow; a distinct role is not specified in the announcement. |
| Victory DOE | Named as Victory Design of Experiments, supporting the described design-of-experiments approach; the release does not publish a particular experiment plan or result. |
In practical terms, the announced combination is intended to let teams explore candidate device and process options in a structured way before deciding which concepts merit further prototyping. The publications do not provide comparative results against another toolchain or development route.
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What does ISIT’s 8-inch post-CMOS environment contribute?
ISIT describes its site as a major German location for 8-inch post-CMOS, MEMS and GaN-on-X processing. The collaboration’s post-CMOS environment supports investigation of emerging GaN and MEMS technologies on 8-inch wafers. That gives the work a physical prototyping context in addition to software-based design and evaluation.
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The published description does not identify a specific GaN substrate or “X” material, process recipe, production capacity, expected yield or volume-production plan. The 8-inch reference describes the facility environment, not a promise that any particular device will reach commercial manufacture at that scale.
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How does APECS connect the partnership to Europe’s semiconductor strategy?
Fraunhofer ISIT says the collaboration aligns with its participation in APECS, a pilot line under the EU Chips Act. APECS’s own news listing recorded the collaboration on June 30, 2025, six days after the June 24 announcement. This links the project to European semiconductor pilot-line activity and policy context.
That connection does not establish that the partnership itself received a specified EU grant or that the EU Chips Act directly funds a particular device or production run. The announcements provide no funding amount or allocation. ISIT’s stated focus on industrial partners and customer-specific components offers a route toward commercialization, but no commercial outcome is reported for this collaboration.
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What is known—and not yet established—about the results?
The primary announcements establish the participating organizations, announced date, tool names, GaN and related power/sensor scope, 8-inch post-CMOS setting, and APECS context. They do not publish a contract value, quantitative performance improvement, completed-device result, yield, production volume, IP ownership arrangement or production commitment. Those outcomes should be treated as unknown, not assumed from the alliance announcement.
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