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At IEDM 2017, Intel and GlobalFoundries presented papers on their respective 10nm and 7nm FinFET process technologies—not new retail chips. Intel highlighted third-generation FinFETs, advanced patterning and cobalt interconnects; GlobalFoundries described a 7nm platform with quad-patterned fins and performance and density projections. The node names are company labels, not direct measurements that make the two processes comparable by number alone.
What the companies brought to IEDM 2017
EE Times previewed the presentations on October 18, 2017. The official 2017 IEDM archive lists Intel’s paper as “A 10nm High Performance and Low-Power CMOS Technology Featuring 3rd Generation FinFET Transistors, Self-Aligned Quad Patterning, Contact over Active Gate and Cobalt Local Interconnects.” The subject was process technology, rather than a product launch or a comparison of finished chips.
The two presentations described different process attributes and used different company baselines for their reported comparisons. Accordingly, figures such as transistor dimensions, SRAM cell area, current, density, performance and power should be read in their stated contexts—not combined into a single ranking.
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EE Times’ October 2017 preview reported a 7nm fin width, 34nm fin pitch and 46nm fin height for Intel’s process. Intel used self-aligned quadruple patterning to form the fins. These are specific process details reported by the publication, not independent measurements of product performance.
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The preview described a 204 Mbit SRAM and three classes of memory cell—high-density, low-voltage and high-performance—with cell areas ranging from 0.0312µm² to 0.0441µm². It also reported 12 metal interconnect layers and support for multiple threshold voltages.
Reported electrical and cobalt-wire claims
Against Intel’s 14nm process, the preview attributed to Intel reported gains of 71% in NMOS current and 35% in PMOS current. It also said cobalt was used in the lowest two metal layers, with claims of up to 10 times better electromigration and half the via resistance. These are reported process claims from the 2017 coverage; they do not establish an across-the-board advantage in products built with the process.
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GlobalFoundries’ 7nm process: patterning and projections
EE Times described GlobalFoundries’ 7nm FinFET process as using self-aligned quad patterning for fins and double patterning for metallization. The preview reported a 0.0269µm² SRAM cell. That figure is smaller than the lower end of Intel’s reported cell-area range, but the reported values alone do not show equivalent memory designs or establish a general process advantage.
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Compared with GlobalFoundries’ 14nm process, which the article described as licensed from Samsung, the preview reported company projections of 2.8 times better routed logic density and either more than 40% greater performance or 55% lower power. These were alternative projected trade-offs, not independent measurements or guaranteed outcomes for finished products.
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What the EUV description meant
Although the earlier plan discussed EUV, a contemporaneous post-presentation report clarified that the 7nm platform was based on immersion optical lithography and designed to permit EUV insertion at selected levels to improve cycle time and manufacturing efficiency. The distinction matters: EUV was an option for selected process levels, not the stated basis of the platform.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.How to compare the two presentations
| Attribute | Intel 10nm | GlobalFoundries 7nm |
|---|---|---|
| Fin patterning | Self-aligned quadruple patterning; preview reported 7nm fin width, 34nm pitch and 46nm height (EE Times, October 2017) | Self-aligned quad patterning, as described by EE Times’ 2017 preview |
| Reported SRAM cell information | 204 Mbit SRAM; cell areas from 0.0312µm² to 0.0441µm² (EE Times, October 2017) | 0.0269µm² SRAM cell (EE Times, October 2017) |
| Metallization | 12 metal layers; cobalt in the lowest two, according to the preview | Double patterning for metallization, according to the preview |
| Reported comparison | Versus Intel 14nm: 71% greater NMOS current and 35% greater PMOS current (EE Times, October 2017) | Versus GlobalFoundries’ Samsung-licensed 14nm: projected 2.8× routed logic density, or over 40% greater performance, or 55% lower power (EE Times, October 2017) |
| Basis of figures | Process details and company claims reported by EE Times; not an independent common benchmark | Company projections reported by EE Times; not independent measurements |
The table is useful for identifying what each presentation emphasized, not for declaring a winner. The companies’ comparison baselines differ, and the cited metrics do not form a common benchmark set. In particular, “10nm” and “7nm” are process labels; the labels alone do not establish relative transistor size or overall capability.
Quick Recap
Best Value
- Game without compromise. Play harder and work smarter with Intel Core 14th Gen processors
- 24 cores (8 P-cores plus 16 E-cores) and 32 threads. Integrated Intel UHD Graphics 770 included
- Leading max clock speed of up to 6.0 GHz gives you smoother game play, higher frame rates, and rapid responsiveness
- Compatible with Intel 600-series (with potential BIOS update) or 700-series chipset-based motherboards
- DDR4 and DDR5 platform support cuts your load times and gives you the space to run the most demanding games
Rank #4
- Game Without Compromise. Play harder and work smarter with Intel Core 14th Gen processors
- 20 cores (8 P-cores plus 12 E-cores) and 28 threads. Discrete graphics required
- Up to 5.6 GHz with Turbo Boost Max Technology 3.0 gives you smooth game play, high frame rates, and rapid responsiveness
- Compatible with Intel 600-series (with potential BIOS update) or 700-series chipset-based motherboards
- DDR4 and DDR5 platform support cuts your load times and gives you the space to run the most demanding games
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