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On 14 October 2004, EE Times reported that Rasa Industries planned to invest 3.5 billion yen in a 300-mm silicon wafer-reclaim facility at its Sanbongi factory in Miyagi Prefecture. The announcement described a plan, not a current construction project, and the available sources do not establish whether the investment was completed as announced.
What Rasa announced in 2004
The EE Times report, by Mark LaPedus, described a planned 3.5 billion yen investment in a facility to reclaim 300-mm silicon wafers at Rasa’s Sanbongi factory. Wafer reclaim is an industrial process that cleans and reconditions used silicon wafers for reuse in suitable applications; it is distinct from manufacturing new semiconductor wafers.
The announcement was specific to Sanbongi, in Miyagi Prefecture, Japan. It should be read as a historical company plan reported in 2004—not as evidence that Rasa is building the facility now. EE Times, 14 October 2004.
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Rasa Industries’ corporate timeline records that the company began silicon wafer reclaim at Osaka in 1984, established its Sanbongi factory and began reclaim there in 1985, then withdrew from wafer reclaim at Sanbongi in 2010. That timeline places the 2004 report within a longer period of reclaim activity at the factory, but it does not confirm whether the particular investment reported in 2004 was completed as announced. RASA Industries, company history.
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Later Sanbongi capacity plans are separate
RS Technologies’ February 2026 investor presentation includes later plans for reclaimed 12-inch wafer capacity at Sanbongi. The figures below are planned monthly capacity, not verified production, and belong to the later presentation—not to Rasa’s 2004 announcement.
| Year | Sanbongi planned monthly 12-inch capacity |
|---|---|
| 2026 | 380,000 wafers |
| 2027 | 470,000 wafers |
| 2028 | 520,000 wafers |
RS Technologies said its 2026 and 2027 Sanbongi plans were revised upward by bringing forward the restart of Plant 7. These forward-looking figures do not establish actual output or a connection to the 2004 project. RS Technologies, Financial Results Briefing Material, February 2026.
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- Precision Wafer Handling Tool: Designed for safe and precise handling of silicon wafers, semiconductor chips, and flat substrates during inspection, processing, evaporation, and laboratory applications.
- High-Purity PEEK Material Construction: Made from high-performance PEEK (Polyether Ether Ketone) polymer, offering excellent mechanical strength, low contamination characteristics, and suitability for semiconductor and precision laboratory environments.
- High Temperature & Chemical Resistance: PEEK material provides excellent thermal stability and supports short-term exposure up to approximately 300°C while maintaining strength and dimensional stability. Resistant to many chemicals and solvents.
- Flat Tip Wide Jaw Design: Features a flat tip and wide gripping jaw structure to provide stable and gentle handling of delicate wafers and flat samples while reducing surface contact impact.
- Low Outgassing & Long-Term Durability: Designed with low outgassing, low moisture absorption, wear resistance, and excellent dimensional stability, making it suitable for cleanroom, semiconductor fabrication, research, and inspection applications.
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