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Arm’s Dipti Vachani described a central automotive challenge: autonomous vehicles may need enormous computing resources, but production cars cannot carry the power and cooling demands of a data center. In an April 2022 EE Times interview, she connected that challenge to Arm’s work on compact processors, edge AI, cloud-based development and SOAFEE, an open architecture for software-defined vehicles.
Why autonomous vehicles need more than raw computing power
Autonomous vehicles must process data and run complex software within tight limits on power, cooling, space and safety. Vachani said a fully autonomous vehicle could need “almost a billion lines of code.” She argued that a data-center-on-wheels design requiring extensive liquid cooling would not be viable for production: “This is not going to work in a production environment.” The EE Times interview captures her view that automotive computing has to scale without simply importing data-center assumptions.
How Arm approaches compact IoT and edge AI
M-class processors for small devices
Vachani presented Arm’s M-class processors as a way to serve devices that need capable computing in a compact, power-conscious design. In the 2022 interview, she said Arm estimated there were “215 billion devices,” with “a third of those” using M-class processors. Those are Arm figures as stated by Vachani at the time, not current device counts.
Ethos NPUs alongside the CPU
For edge AI, Vachani pointed to Arm Ethos neural processing units (NPUs). The idea is to combine general-purpose processing with dedicated neural-network acceleration, reducing the memory and surrounding hardware needed to run AI workloads at the edge. The trade-off is architectural: developers must match the workload and software to the available CPU and NPU resources while respecting the device’s power and physical constraints.
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How Arm Total Solutions and Virtual Hardware support development
Total Solutions for heterogeneous systems
Arm Total Solutions aims to make hardware and software co-development more consistent across systems that combine CPUs, NPUs, image signal processors (ISPs) and GPUs. Such heterogeneous designs can support a range of workloads, but they also make integration and software reuse harder. A common solution environment is intended to give developers a more coherent starting point across those components.
Virtual Hardware before target silicon is ready
Arm Virtual Hardware lets developers start writing and testing software in the cloud before the physical target silicon is available. Vachani described it as a way to create “this consistent solution environment in the cloud.” That can bring software work forward in a project timeline; it does not mean the virtual environment replaces later validation on the actual hardware.
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What SOAFEE is and why it matters to software-defined vehicles
SOAFEE stands for Scalable Open Architecture for Embedded Edge. Arm describes it as an open architecture and reference implementation for applying cloud-native software practices to automotive edge systems, where power and functional-safety constraints remain essential. Its purpose is to help make development practices and software more portable across automotive compute platforms, rather than tying every application to one bespoke stack.
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Vachani’s plain-language description of a software-defined vehicle was: “It’s quite simply that the function of the vehicle is upgraded, and or improved by an automatic download of software.” SOAFEE’s initiative announcement frames the effort around an open ecosystem; its success depends on participation across the companies building vehicle hardware, software and development tools.
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The practical balance: reuse, safety and production limits
These ideas address connected but distinct problems. Compact M-class processors and Ethos NPUs target efficient computation in small devices and edge systems. Total Solutions and Arm Virtual Hardware aim to ease cross-component development and let software work begin earlier. SOAFEE targets shared, cloud-native practices for automotive software. None removes the need to assess a real design against its power and cooling envelope, physical footprint, CPU/NPU/ISP/GPU integration, software portability, functional-safety requirements and path from prototype to production.
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