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At IEDM 2019, CEA-Leti presented three different research directions: an integrated chip that combines memory-based synapses with spiking neurons, readout methods intended to help scale silicon quantum-dot arrays, and an all-solid thin-film battery. The demonstrations point toward possible uses in edge computing, quantum processors and compact sensors, but they are research platforms—not named consumer products. Later battery and neuromorphic work adds context to how these technologies developed.

What the three technologies have in common—and what they do not

All three aim to bring useful functions into small, integrated hardware. Their technical challenges and performance measures are different, however: the neural-network chip is about energy use during inference, quantum-dot readout is about reliably measuring states across an array, and batteries are characterized by capacity, power and physical dimensions. Their headline figures cannot be compared as if they measured the same thing.

Research direction Integration or scaling question Reported result or measure Target applications
Bio-inspired chip Can memory and neural computation work together on one chip? Handwritten-digit classification; fivefold lower energy than an equivalent formal-coding chip, as reported for the demonstration Energy-conscious edge inference
Quantum-dot readout Can different measurements serve arrays of differing length? Complementary gate-reflectometry methods for charge counting and spin readout Silicon quantum processors
Thin-film batteries Can compact solid-state cells be fabricated and integrated for small devices? Capacity and power density, cell dimensions, and manufacturing approach Implantable and other compact sensors

How the bio-inspired chip combines memory and computation

RRAM synapses and analog spiking neurons on one chip

The IEDM 2019 demonstration integrated resistive random-access memory (RRAM) synapses with analog spiking neurons. In a conventional arrangement, data may need to travel between memory and a separate processor. Keeping the synaptic memory close to the computation can reduce that movement, while event-based spikes allow the network to communicate through discrete activity rather than continually processing every value in the same way.

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CEA-Leti lead author Alexandre Valentian described the degree of integration plainly: “The entire network is integrated on-chip.” The team demonstrated handwritten-digit classification, so this was a hardware demonstration rather than a result based only on software simulation or externally emulated network components.

What the energy and reliability results mean

EE Times reported that the chip used five times less energy than an equivalent chip using formal coding. That is a comparison between the reported demonstration and its stated reference—not a general guarantee that every spiking network will use one-fifth the energy of a conventional system. The same account reported no RRAM read-disturb issue during inference testing involving at least 750 million spikes.

In a later 2023 update, CEA-Leti described a synaptic transistor consuming 1 femtojoule per square micrometre, with a 200 nm layer and durability beyond 100,000 cycles. Those figures concern a later device and should not be treated as measurements of the IEDM 2019 chip.

How gate reflectometry supports scalable quantum-dot readout

Measuring charge and spin states

In a silicon MOS quantum dot, gate reflectometry detects impedance changes in a radio-frequency (RF) line connected to the device. CEA-Leti’s work used an SOI MOSFET prototyping platform and explored two complementary ways to read quantum-dot arrays.

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  • Charge counting and initialization: One readout system determines how many charges enter an array, information that can help initialize it.
  • Spin-state readout: The other reads the spin state in any dot regardless of array length, but does not track the number of charges.

The proposed scaling advantage comes from using the methods together: one supplies charge-count information, while the other can read spin states without the same dependence on array length. This is a readout strategy, not evidence that arbitrarily large arrays are already operating as finished quantum processors. The research involved CEA-Leti, CNRS Institut Néel, CEA-IRIG, the Niels Bohr Institute and UK laboratories.

The remaining engineering challenge

Lead author Louis Hutin said the team’s short-term work would focus on jointly optimizing the readouts to improve speed and reliability. That distinction matters: supporting readout across array lengths addresses one scaling problem, while making measurements faster and more dependable remains a separate engineering task.

What the thin-film battery results show

The IEDM 2019 solid-state architecture

The 2019 battery used an all-solid, inorganic thin-film stack with a 20 μm lithium cobalt oxide (LiCoO2) cathode and a lithium-free-anode design. “Lithium-free anode” describes the anode configuration; it does not mean the whole cell contains no lithium, since the cathode material is LiCoO2.

The reported figures were 890 μAh·cm−2 for areal capacity (described in the release as areal energy density), capacity up to 450 μAh·cm−2 at a current density of 3 mA·cm−2, and power density up to 12 mW·cm−2. The units matter: μAh·cm−2 expresses charge capacity per area, while mW·cm−2 expresses power per area. These are different measures and should not be conflated.

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CEA-Leti lead author Sami Oukassi identified implantable sensors and biological-function monitoring—such as intraocular-pressure sensors and blood-glucose measurement—as suitable targets. The work also proposed uses including cochlear implants and smart contact lenses; these are application possibilities, not evidence that the battery is already sold inside such products.

Later TINY and wafer-flow work

A CEA-Leti TINY battery report published on 30 May 2023 described a rechargeable solid-state thin-film cell made with conventional MEMS production equipment. It gave a footprint of 5 mm2, a total thickness of 100 μm and a discharge capacity of 20 μAh.

In a 12 March 2024 update, CEA-Leti described sub-square-millimetre batteries fabricated using a 200 mm wafer flow. The update reported a maximum discharge capacity of 1.5 mAh·cm−2 and said this was five times the areal capacity of commercially available products at that time. That comparison is specific to the source’s contemporaneous benchmark; it does not establish a universal advantage over every battery product or a current market comparison.

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How to read the scalability claims

“Scalable” means something different in each of these projects, so the relevant evidence depends on the technology:

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  • Neural-network chip: The key point is integration of memory and spiking computation on one chip, with a demonstrated classification task and a stated energy comparison.
  • Quantum-dot readout: The key point is complementary measurement modes, including spin readout that works across array lengths; speed and reliability were identified as optimization goals.
  • Thin-film batteries: The key points include small device dimensions and use of conventional MEMS equipment or a 200 mm wafer flow, alongside capacity and power measurements.

A smaller battery footprint, a longer quantum-dot array and lower inference energy are not interchangeable meanings of scale. Each describes a different engineering constraint.

Are these products available to consumers?

The cited work describes research demonstrations and prototyping platforms, not named consumer products available for purchase. The reported results do not establish that a consumer can buy the IEDM chip, quantum-dot readout system or Leti thin-film battery as a standalone device. Generic batteries, AI development boards and quantum-themed products should not be mistaken for these specific technologies.

Potential commercial routes are more likely to involve specialist partners—for example, MEMS or microfabrication services, thin-film battery characterization, or quantum-dot and cryogenic readout equipment. Whether any particular supplier or product is connected to CEA-Leti’s work requires verification; the research results alone do not establish such a relationship.

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