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Applied Materials and Lam Research make semiconductor-manufacturing equipment and process systems, not finished computer chips. Their tools deposit films, remove selected materials, alter surfaces, clean wafers, measure process changes and connect separately made devices. Chipmakers use that equipment repeatedly—Lam describes chip production as involving hundreds of individual steps—to turn a design into reliable structures on silicon wafers.
What do Applied Materials and Lam Research make?
Both companies sell specialized capital equipment for semiconductor fabrication plants, commonly called fabs. A fab processes circular silicon wafers through a long sequence of controlled operations. Each operation changes the wafer by adding, removing, modifying, cleaning or measuring material. The equipment supplier provides the chamber, process controls, sensors, software and related systems that make those changes repeatable.
The output of an Applied Materials or Lam Research tool is therefore not a finished processor, memory module or phone chip. It is a wafer step: a precisely deposited film, an etched opening, a cleaned surface, a modified layer or a measurement that tells engineers whether the process stayed within specification. Many such steps, followed by assembly and testing, are needed before a chip can be sold.
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| Process family | What happens to the wafer | Why the step matters |
|---|---|---|
| Deposition | A thin conducting, insulating or other functional film is formed on the wafer. | Creates layers that will become wiring, barriers, gates, spacers or other device structures. |
| Etch and material removal | Selected portions of a film are removed while surrounding material is protected. | Transfers patterns into the stack and defines trenches, contacts, lines and other features. |
| Strip and cleaning | Photoresist, particles, contaminants and process residue are removed. | Leaves a surface suitable for the next operation and prevents defects from propagating. |
| Modification | The electrical or physical properties of a material are changed, for example by ion implantation or heat. | Tunes how transistor and interconnect materials behave. |
| Metrology and analysis | Material amount, dimensions, defects or pattern changes are measured. | Lets the fab detect drift and control a process before many wafers are affected. |
What does Applied Materials sell?
Applied Materials’ semiconductor portfolio is broad. Its official overview groups products by the kind of material change or device connection they enable. The list below describes those portfolio families; it is not a claim that every product has the same market position or is used in every fab.
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| Applied Materials portfolio area | Examples listed in the portfolio | Role in manufacturing |
|---|---|---|
| Creating and depositing materials | Atomic layer deposition (ALD), dielectric and metal deposition, epitaxy, plating and selective deposition | Builds controlled films and crystal layers, including conductors and insulators. |
| Shaping and removing materials | Chemical-mechanical planarization (CMP), etch, pattern shaping, photomask and selective etch | Removes material, smooths surfaces and controls the profile of patterned features. |
| Modifying materials | Ion implantation and thermal processing | Changes composition or activates material properties needed for device operation. |
| Analyzing materials | Defect control and patterning control | Finds defects and verifies that dimensions and patterns remain within process targets. |
| Connecting devices | Heterogeneous-integration technologies | Supports assembling different dies or device types into a connected package. |
In practical terms, Applied can address several points in a wafer flow: forming a film, selectively removing it, changing its properties, checking the result and helping connect separately manufactured components. That breadth is why a description of Applied Materials as only a deposition company would be incomplete.
Deposition technologies in plain language
ALD builds a film through repeated, self-limiting surface reactions. That approach is useful when a layer must be extremely uniform on the sides and bottoms of narrow, deep structures. Epitaxy grows a crystalline layer aligned with the underlying wafer. Metal and dielectric deposition create conductive and insulating portions of a device, while selective deposition aims to place material on one surface without coating another. Plating adds metal in suitable structures, often after a seed layer has been prepared.
Removal, modification and control
Etch and selective-etch systems remove targeted material without erasing every neighboring layer. CMP combines chemical reactions and mechanical polishing to flatten a wafer so later layers can be aligned. Ion implantation introduces dopant species into selected regions, and thermal processing activates or repairs material changes. Defect and patterning-control systems provide information about whether those operations produced the intended result.
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What does Lam Research make?
Lam Research’s process overview emphasizes five connected equipment families: thin-film deposition, plasma etch, photoresist strip, wafer cleaning and mass metrology. Together they cover building a film, carving features into it, removing temporary process materials, preparing the surface and measuring how much material changed.
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| Lam process family | Function | Typical process question it answers |
|---|---|---|
| Thin-film deposition | Forms conducting metal and insulating dielectric layers. | Can the fab create a film with the required thickness, composition and uniformity? |
| Plasma etch | Uses a plasma process to selectively remove wafer films. | Can the intended feature be cut without unacceptable damage or distortion? |
| Photoresist strip | Removes photoresist after it has served as a temporary pattern mask. | Is the wafer free of the resist before the next operation? |
| Wafer cleaning | Removes particles, contaminants and residues. | Is the surface clean enough for the next film or patterning step? |
| Mass metrology | Measures material changes associated with deposition, etch and cleaning. | How much material was added or removed, and is the process drifting? |
Lam’s emphasis does not mean that every Lam tool performs all five functions in one chamber. Fabs combine dedicated systems and process modules in a sequence, with measurement and feedback used to keep the sequence stable.
How these tools turn a chip design into a wafer
A chip design specifies electrical structures, but a fab must realize those structures as physical layers with controlled dimensions. The following simplified sequence shows where equipment suppliers fit. Actual manufacturing flows repeat and interleave these operations many times, and the exact order differs by device and process generation.
- Prepare a surface. The wafer enters a tool with a known condition. Cleaning removes particles and residues that could create a defect under the next layer.
- Deposit a film. A deposition system forms a metal, dielectric, semiconductor or other layer. The required thickness and composition depend on the device structure.
- Pattern the layer. Lithography defines temporary protected and exposed regions. The equipment portfolios discussed here support related pattern-shaping, photomask, deposition and etch operations, but this article does not treat lithography exposure tools as products of either company.
- Etch selected material. Plasma or other etch processes remove exposed portions and transfer the pattern into the underlying film. Selectivity matters: the target layer must be removed while neighboring materials remain usable.
- Strip and clean. Photoresist and etch residues are removed, followed by cleaning to clear particles and contaminants before another operation.
- Modify electrical properties. Ion implantation or thermal processing changes a region’s composition, activation or structure where the device recipe requires it.
- Flatten or refine. CMP can planarize the surface, while additional selective deposition, etch or pattern-control steps refine small features.
- Measure and adjust. Metrology and defect-control systems compare the wafer with process targets. Engineers use the result to correct a recipe, chamber condition or incoming material before variation spreads.
Because these operations are repeated across many layers, a tiny error can affect later alignment, resistance, leakage or yield. Lam describes chip production as involving hundreds of individual steps, so process control is a manufacturing requirement rather than an optional inspection at the end.
Why do chipmakers need semiconductor equipment?
Advanced features are three-dimensional and material-intensive
Modern logic and memory devices are not simply flat pictures printed on silicon. They use narrow openings, stacked films, vertical channels, nanosheets and many different conducting and insulating materials. A tool must place or remove material at the required location while limiting damage to surfaces that will remain in the device.
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Uniformity determines whether a wafer can be used
A fab processes many dies on one wafer and many wafers in a production lot. If deposition is thicker at one location, etch removes too much at another, or cleaning leaves particles behind, electrical characteristics can vary across the wafer. Metrology and defect-control systems expose that variation early enough for the fab to respond.
Yield makes process repeatability economically decisive
Every wafer contains multiple potential chips. A defect can reduce the number that pass testing, while a systematic process error can affect an entire lot. Equipment that maintains a stable recipe, handles the wafer consistently and provides useful measurements helps the chipmaker turn expensive materials and processing time into more sellable devices.
New device architectures require new process windows
When a transistor or memory cell changes shape, a familiar process may no longer provide enough selectivity, conformality or profile control. Equipment suppliers therefore develop chambers and chemistries for particular materials and geometries. The supplier’s role is enabling manufacturing at the required dimensions; it is not choosing the chip’s architecture or selling the finished product.
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Applied Materials and Lam Research: where they overlap and differ
There is genuine overlap in deposition and etch. Both companies can address the operations of adding films and selectively removing them. A useful comparison is the process role, not an unsupported claim that one company is universally better.
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| Comparison axis | Applied Materials | Lam Research |
|---|---|---|
| Deposition | Portfolio lists ALD, dielectric, metal, epitaxy, plating and selective deposition. | Process overview emphasizes thin-film deposition for conducting metals and insulating dielectrics. |
| Etch and removal | Lists etch, selective etch, pattern shaping, photomask and CMP. | Emphasizes plasma etch for selectively removing wafer films. |
| Material modification | Lists ion implantation and thermal processing. | Not highlighted in the reviewed process overview. |
| Cleaning and stripping | Cleaning is not the central grouping in the reviewed portfolio summary. | Photoresist strip and wafer cleaning are explicit process families. |
| Measurement and analysis | Lists defect and patterning control. | Highlights mass metrology for material changes after deposition, etch and cleaning. |
| Integration | Lists heterogeneous-integration technologies. | Not highlighted in the reviewed process overview. |
The table compares how each company’s reviewed overview is organized. It does not establish market share, total revenue by process, or which supplier a particular chipmaker must choose. Fabs qualify tools against a specific recipe, material stack, throughput target, defect limit and service requirement.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.Recent examples from Applied Materials’ 2026 announcements
The following examples illustrate how a supplier targets a specific material and geometry. The performance, adoption and application statements are claims made by Applied Materials in its announcements.
Silicon nitride ALD and molybdenum etch for 3D structures
On June 15, 2026, Applied Materials announced Centris Spectral SiN ALD, intended to deposit silicon nitride uniformly in deep, narrow structures. The same announcement introduced Producer Selectra Mo Etch, intended to selectively remove molybdenum for wordline separation in 3D NAND. Applied said the systems address high-aspect-ratio logic and memory structures. In both cases, the problem is geometric as much as chemical: material must be deposited or removed throughout a difficult three-dimensional feature without unacceptable variation.
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The announcement quoted Dr. Prabu Raja, president of Applied Materials’ Semiconductor Products Group: “From transistor structures to memory stacks, chipmakers need new ways to precisely deposit and selectively remove materials in extremely complex 3D architectures.” This is an executive statement in a company release, not an independent industry assessment.
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Equipment for gate-all-around transistors and advanced wiring
On February 10, 2026, Applied announced systems for gate-all-around (GAA) transistor and wiring processes at 2 nanometers and beyond. The named systems were Viva radical treatment for nanosheet surfaces, Sym3 Z Magnum conductor etch for trench-profile control and Spectral ALD for molybdenum contacts. The announcement also discussed potential DRAM and high-bandwidth-memory applications. These examples show equipment being tuned to particular surfaces, conductors and feature profiles rather than sold as generic machines.
Applied reported that Sym3 Z had more than 250 chambers in the field and tool-of-record status in 2nm logic manufacturing. That is a company-reported figure from the February 2026 announcement, not an independent market count. Applied also reported up to 15 percent lower critical contact resistance for the described molybdenum ALD system against its stated Endura Volta selective-tungsten benchmark. The comparison and percentage apply to the conditions and benchmark described by Applied; they should not be generalized to every contact or fab.
How to interpret supplier claims
- Separate capability from outcome. “Deposits silicon nitride in deep structures” describes an intended process capability. A claim about yield, resistance, adoption or cost is an outcome claim that needs its stated conditions.
- Check the reference point. A percentage improvement is meaningful only against the named benchmark, recipe and measurement definition.
- Distinguish installed tools from market share. A reported chamber count is evidence about that company’s stated installed base, not a census of the industry.
- Ask which device is involved. Logic, DRAM and 3D NAND use different stacks, dimensions and failure modes. A result for one application does not automatically transfer to another.
- Look for process integration. A deposition or etch tool is judged alongside cleaning, metrology, materials, recipe control and neighboring steps. The best fit depends on the complete wafer flow.
What this means for a chipmaker
Choosing equipment is a process-integration decision. Engineers evaluate whether a system can produce the required film or feature, maintain uniformity across the wafer, avoid damaging adjacent materials, meet throughput and uptime goals, and provide measurements that support control. They also qualify the tool with the fab’s chemicals, wafers, masks, recipes and downstream operations.
Applied Materials and Lam Research are therefore best understood as enabling-technology suppliers inside the semiconductor production chain. Their equipment makes the repeated material transformations possible; chip designers and manufacturers determine the device architecture, process recipe and final product.
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