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In December 2004, Shin-Etsu Chemical announced a plan to invest about US$1 billion in expanding 300-mm silicon-wafer production in Japan and building a new plant in Vancouver, Washington. The goal was to lift Shin-Etsu Handotai’s (SEH’s) monthly capacity from 300,000 wafers to 500,000 by autumn 2006, with a further increase to 700,000 after 2007 possible if demand warranted it. Those were announced targets, not verified production results.
Why was SEH spending $1 billion on 300-mm wafers?
The investment addressed a shift within the silicon-wafer market: a Shin-Etsu Chemical spokesman said total wafer demand had reached a plateau, while demand for 300-mm wafers was increasing. The company planned to expand production to meet that growth rather than treat the overall market trend as a reason to stand still.
The contemporaneous report estimated monthly demand for 300-mm wafers at roughly 700,000 in 2004, rising to 900,000 by the end of 2005, 1.1 million in 2006 and 1.4 million in 2007. These were period estimates, not later-confirmed demand figures. The plan’s conditional 700,000-wafer monthly capacity target would therefore still have been below the report’s estimate of 2007 demand.
Where was Shin-Etsu building and expanding production?
The roughly US$1 billion plan combined expansion at SEH facilities in Fukushima Prefecture, Japan, with construction of a new 300-mm wafer manufacturing plant in Vancouver, Washington. The announcement did not assign separate investment amounts to the Japanese work and the Washington facility.
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- Wafer Pattern May Vary from the Product Images. Great to be used as gift, display object, exhibition, educating demonstration, testing, decoration or your collection
- Beautiful microchip pattern structure made by the advanced copper technology
- 90~130nm minimum microchip feature Copper Characterization with TEOS or Black Diamond Low-k ILD on the single crystal silicon wafer
- The original value of un-polished wafer is above $500
- No guarantee for research and other applications
Vancouver was planned as SEH’s first 300-mm silicon-wafer production site outside Japan. Shin-Etsu said having production in another geographic location would help assure customers of stable supply under different circumstances. The diversification rationale was about supply resilience; the announcement did not specify a particular disruption or guarantee uninterrupted deliveries.
How many wafers per month would the expansion produce?
SEH outlined a staged increase in global 300-mm wafer capacity. The figures below are targets stated in the 2004 plan, not confirmation that each milestone was reached.
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- Wafer Pattern May Vary from the Product Images. Great to be used as gift, display object, exhibition, educating demonstration, testing, decoration or your collection
- Beautiful microchip pattern structure made by the advanced copper technology
- 90~130nm minimum microchip feature Copper Characterization with TEOS or Black Diamond Low-k ILD on the single crystal silicon wafer
- The original value of un-polished wafer is above $500
- No guarantee for research and other applications
| Milestone in the plan | Monthly capacity | Qualification |
|---|---|---|
| December 2004 baseline | 300,000 wafers | Reported existing capacity |
| By September 2005 | 400,000 wafers | Planned increase |
| By autumn 2006 | 500,000 wafers | Planned capacity target |
| After 2007 | Up to 700,000 wafers | Possible further increase through Vancouver expansion, conditional on customer demand and additional investment |
The sequence matters: 700,000 per month was not part of the initial guaranteed schedule. SEH said it could make further investment if customer demand justified it.
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Outbyte Driver Updater FREEScan for outdated or missing drivers - takes under a minuteDriver Scan →Outbyte PC Repair FREERepair Windows errors before they cause bigger problemsFix Now →What are 300-mm silicon wafers used for?
A 300-mm wafer is a thin, circular slice of silicon crystal used as a substrate for manufacturing semiconductor devices. Shin-Etsu describes a process in which high-purity polycrystalline silicon is converted into a single-crystal ingot. The ingot can be more than a metre long and 300 mm in diameter; it is then sliced, shaped and polished into wafers.
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- Genuine Silicon Wafer: crafted from high-purity silicon, this 12 inch silicon wafer features a precision double-side polished surface, delivering exceptional smoothness and mirror-like reflectivity on both sides, fitting well with tech decor needs; Please note: wafer pattern may vary from the product images
- Genuine Uncut Ic Silicon Wafer: this is a genuine uncut IC silicon wafer, not a replica or model; It preserves the original circular wafer form applied in semiconductor manufacturing, allowing you to experience real chip substrate material up close
- 12 Inch Large Size Versatile Display: with a full 12 inch diameter, this wafer provides a striking visual presence compared to smaller 6 or 8 inch wafers; Its larger size enhances the natural light interference patterns, creating subtle rainbow reflections under different lighting, ideal for desk display, office decor, exhibitions, or as a centerpiece for tech-inspired spaces; Silicon crystals are very fragile, please handle them as gently as possible
- Practical Stem Education Tool: a valuable teaching tool for STEM education, this semiconductor substrate helps illustrate how integrated circuits are manufactured; Great for classrooms, labs, or personal learning, it allows students to better understand wafer structure, fabrication processes, and the foundation of modern electronics in a tangible way
- Tech-inspired Gift: combining science and art, this silicon wafer makes a unique gift for engineers, programmers, students, and tech lovers, suitable for various gifting occasions without being overly decorative
Semiconductor manufacturers build devices on the wafer surface before separating the finished devices into individual chips. Wafer substrates serve production of memory, logic, analog, sensor and discrete semiconductors. SEH America’s current product information also lists 300-mm polished, epitaxial, silicon-on-insulator (SOI) and high-resistivity wafers, with applications including RF, power, photonics and MEMS as well as logic and memory. The product types have different material structures or electrical characteristics, so 300-mm diameter alone does not define a wafer’s use.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.What is known about the plan’s eventual outcome?
The 2004 announcement set out intended investments, sites and capacity milestones. The available reporting does not establish whether the September 2005, autumn 2006 or post-2007 capacity figures were ultimately achieved. They should be understood as plans and conditional targets, not as a record of completed production.
Quick Recap
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- 5 x 5 inches, 0.67 ounces, 0.03 inches thick. Some wafers are marked with alignment marks.
- The pattern is produced by light diffraction, and its reflective appearance changes with the viewing angle.
- Silicon wafers are fragile—please handle with care.
- Circuit details can be examined under a microscope.
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- PRECISION SIZING FOR SPECIFIC WAFERS: Available in exact 4-inch (100mm), 6-inch (150mm), 8-inch (200mm), and 12-inch (300mm) dimensions to provide a perfect, flush fit for your specific silicon wafers. This precise sizing prevents edge overhang and ensures secure, scratch-free isolation during handling and storage.
- ADVANCED ANTI-STATIC PROTECTION: Engineered with specialized anti-static properties to safely dissipate electrostatic charges. This critical feature protects sensitive semiconductor surfaces from ESD (Electrostatic Discharge) damage, ensuring the integrity of your wafers during transport and cleanroom processing.
- ULTRA-LOW PARTICLE GENERATION: Manufactured in a controlled cleanroom environment using high-purity materials, this isolation paper exhibits exceptionally low particle shedding. It acts as a reliable barrier against micro-contamination, maintaining the strict cleanliness standards required for semiconductor fabrication.
- SUPERIOR CUSHIONING & SCRATCH RESISTANCE: Features a smooth, non-abrasive surface texture that provides a soft cushioning layer between wafers. This effectively prevents micro-scratches, edge chipping, and surface defects caused by friction during stacking, shipping, or automated equipment handling.
- VERSATILE SEMICONDUCTOR HANDLING: Ideal for a wide range of applications including wafer storage, inter-batch transport, FOUP/FOSB loading, and cleanroom processing. Compatible with various semiconductor materials, ensuring safe and reliable isolation across your entire production line.
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