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Samsung announced on October 18, 2017, that its 8nm FinFET process, 8LPP (Low Power Plus), had been qualified and was ready for production. Samsung claimed up to 10% lower power consumption and up to 10% less area than 10LPP—but those figures are vendor-stated maximums, not independently verified savings for every chip.
What Samsung announced about 8LPP
Samsung said qualification was completed three months ahead of schedule and that 8LPP production had commenced. That October 2017 readiness announcement is distinct from the later mass-production milestone: Samsung’s current logic-node overview lists 8nm mass production as starting in 2018. Samsung’s 2017 announcement and its current logic-node page describe those separate stages.
What does “up to 10%” mean?
Samsung compared 8LPP with its 10LPP process and claimed two separate potential improvements:
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- Area: up to 10% smaller area versus 10LPP, which Samsung attributed to narrower metal pitch.
“Up to” describes a maximum claim, not a guaranteed result for a particular chip. Samsung’s announcement does not provide measurement conditions or a design-specific result, and the company materials cited here do not independently validate either percentage. The power figure is not a comparison with every older process or a competitor’s node; its stated baseline is 10LPP. Samsung’s announcement gives the comparison.
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How 8LPP fit Samsung’s process roadmap
Samsung described 8LPP as building on proven 10nm process technology. Its May 2017 foundry roadmap said 8LPP would combine innovations from 10nm with additional performance and gate-density benefits. In the October announcement, Samsung positioned 8LPP as the advanced node before its planned use of EUV at 7nm; that is the company’s 2017 roadmap framing, not a general claim about later process generations. Samsung’s May 2017 roadmap provides that broader context.
The 10LPP baseline itself had a separate comparison: Samsung said in April 2017 that 10LPP offered up to 10% higher performance or 15% lower power than first-generation 10LPE at the same area scaling. Those figures compare 10LPP with 10LPE; they are not additional 8LPP-versus-10LPP results. Samsung’s 10LPP announcement states that earlier comparison.
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What applications Samsung targeted
Samsung named mobile, cryptocurrency, and network/server applications, along with other high-performance uses, as targets for 8LPP. These were stated application areas, not proof that any particular product used the process. The sources cited here do not establish a named customer product or customer-specific performance result.
Samsung’s current logic-node page also describes 8nm RF as a one-chip solution aimed at the high-speed data demands of 5G. That later description adds context about the process family, but it does not verify the 2017 power or area percentages. Samsung’s logic-node overview gives the current production and RF descriptions.
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What the announcement establishes—and what it does not
The company sources establish Samsung’s qualification and production-readiness announcement, its stated comparison against 10LPP, its intended application areas, and its later report that 8nm mass production began in 2018. They do not establish independent benchmark results, test conditions, operating conditions, yield, or the outcome for a specific chip design. For a reader assessing the “10%” headline, the defensible interpretation is a Samsung process-level claim with an unspecified measurement setup, not a universal real-world reduction.
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