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RISC-V is an open instruction-set architecture (ISA) that could give automakers a common, adaptable foundation for chips across a vehicle—from real-time controllers to driver-assistance and cockpit computing. It is not a finished processor or a guarantee of lower costs or safer cars: each chip still needs its own software, safety evidence, cybersecurity work, and vehicle qualification. Adoption is advancing, but the clearest public signals include future-facing product plans and European platform projects, not verified vehicle-deployment totals.
What RISC-V means in a car
An ISA defines the instructions software uses to communicate with a processor. RISC-V International standardizes the RISC-V ISA; it does not sell processor cores. Independent IP vendors and chip designers create implementations that conform to the standard, and may build on it with permitted extensions.
That distinction matters in automotive applications. Saying a vehicle uses RISC-V does not identify a particular chip, software stack, safety certification, or production status. Those depend on the vendor’s implementation and the automaker’s system design.
RISC-V’s modular design gives chip developers the option to select a processor family or implementation and add standard or custom extensions for a workload. In principle, an automaker or Tier 1 supplier could pursue a more consistent software and toolchain direction across different vehicle chips, rather than rely on a collection of unrelated instruction sets. RISC-V International presents roadmap control, portability, supplier options, and workload-specific tuning as potential advantages; none automatically establishes lower chip costs or faster certification.
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Which vehicle systems could use RISC-V?
The architecture is intended to span different kinds of vehicle computing. A shared ISA does not mean one processor can meet every system’s performance, timing, power, and safety needs.
Real-time control and zonal systems
Microcontrollers could run deterministic control loops in braking, body electronics, power systems, batteries, and zonal controllers. These jobs depend on predictable timing, not just peak processing speed.
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- CH32V003 Development Minimum System Board for Nano RISC-V CH32V003F4U6 Chip TYPE-C USB 22Pin
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ADAS and automated driving
Higher-performance processors and accelerators could support perception, planning, and AI inference. These are demanding applications, and an ISA alone does not demonstrate that a particular implementation meets a vehicle program’s performance or functional-safety requirements.
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Heterogeneous systems—combining different types of processing resources—could handle software-defined vehicle services, infotainment, voice interaction, personalization, and AI workloads.
Rank #3
- The ESP32-C3 SUPERMINI is positioned as a high-performance, low-power, cost-effective IoT mini development board, suitable for low-power IoT applications and wireless wearable applications
- It is equipped with a rich set of interfaces, including 11 digital I/Os that can be used as PWM pins and 4 analog I/Os that can be used as ADC pins.
- It supports four serial interfaces, including UART, I2C, and SPI.
- The ESP32-C3 features a 32-bit RISC-V CPU, including an FPU (Floating Point Unit) capable of 32-bit single-precision
- Package: 2PCS ESP32-C3 MINI Development Board ESP32 SuperMini ESP32 C3 WiFi Module
Safety and security functions
Vendors could implement isolated or redundant processing, security monitors, and safety mechanisms in dedicated parts of a chip. The relevant evidence comes from the specific design and its development and qualification process, not from the RISC-V name by itself.
Is RISC-V ready for automotive use?
RISC-V is becoming a credible basis for automotive development, but readiness must be judged at the level of a particular chip and vehicle program. Automotive electronics face demanding requirements for functional safety, cybersecurity, deterministic behavior, software compatibility, long product lifecycles, and qualification evidence. A conformant core still needs implementation and verification, safety analysis, cybersecurity engineering, software, tool qualification, manufacturing, and vehicle-level validation.
Rank #4
- ESP32-C6 WiFi 6 microcontroller development board adopts ESP32-C6-WROOM-1-N8 module, which is equipped with RISC-V 32-bit single-core processor, up to 160MHz main frequency, built-in 8MB Flash
- Integrates WiFi 6, Bluetooth 5 and and IEEE 802.15.4 (Zigbee 3.0 and Thread) wireless communication, with superior RF performance
- Integrates rich peripherals including SPI, UART, I2C, I2S, LED PWM, SDIO and other interfaces, compatible with the pinout of ESP32-C6-DevKitC-1-N8 development board, more convenient to use and expand a variety of peripheral modules
- Onboard CH343 and CH334 USB HUB chips, supports USB and UART development at the same time via a USB-C port
- Comes with online examples and tutorials for ESP-IDF development environment
Public announcements and project descriptions show that companies and European initiatives are developing the ecosystem. They do not, on their own, establish delivered vehicle volumes or prove that a given design has completed qualification for a production car. The available evidence does not establish a verified current percentage of automotive deployments, production units, or revenue using RISC-V.
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What the adoption signals show
- Infineon: On 6 March 2025, Infineon Technologies AG announced an automotive RISC-V microcontroller family planned for launch “within the coming years.” The announcement is a roadmap signal, not confirmation of current availability or a production-car deployment. Infineon said: “Microcontrollers based on RISC-V help to meet these complex requirements, reducing vehicle complexity and time to market at the same time.” This is the company’s claim, not independent validation. Infineon’s 6 March 2025 announcement.
- European Rigoletto project: The European Commission’s 19 May 2025 project record describes an effort targeting a RISC-V automotive hardware platform, including processor cores, accelerators, interconnects, memory hierarchy, and peripheral subsystems. The Commission’s broader digital-vehicle ecosystem policy also describes a pre-competitive RISC-V platform effort with AI computing capacity. These descriptions indicate scope and direction, not completed vehicle deployments. European Commission: Rigoletto project.
- Industry coordination: RISC-V International’s 2025 annual report describes automotive adoption accelerating through silicon, software, and deployments. Its Automotive Hub documents ecosystem sessions on safety, security, and automotive computing; its supply-chain material describes Automotive SIG and Functional Safety SIG work to align requirements such as long lifecycles, functional safety, and real-time behavior. These are signs of ecosystem-building, not a substitute for product-specific qualification. RISC-V International 2025 annual report.
Could RISC-V reduce automotive chip costs?
It could give chip designers and vehicle makers more control over processor roadmaps and supplier choices, and allow them to tailor implementations to particular workloads. Those options may be valuable, especially when a program needs specific power, performance, AI, safety, or security characteristics.
Best Value
- Ample PSRAM Storage – The development board offers 8MB PSRAM, providing substantial extra memory for handling more complex tasks, large data buffers, and advanced processing.
- Enhanced Multi-Tasking Capability – With the additional 8MB PSRAM, the ESP32-C5-WIFI6-KIT can efficiently manage multiple protocol stacks simultaneously, ensuring smooth operation in multi-tasking IoT environments.
- Support for Medium-Load Applications – The 8MB PSRAM allows the ESP32-C5 to handle medium-load applications more effectively, making it ideal for scenarios requiring real-time data processing or continuous communication.
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- Future-Proof for Complex Projects – With 8MB of PSRAM, developers are better equipped to build scalable, high-performance solutions that support both current and future IoT use cases, offering flexibility for future-proofing designs.
But openness of the ISA does not make the whole chip free, nor does it ensure a lower bill of materials. Implementation, verification, software, safety and cybersecurity work, qualification, manufacturing, and long-term support all carry costs. A meaningful cost comparison would need to account for the complete design and program lifecycle; no verified savings figure is established here.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.How does RISC-V compare with Arm or proprietary automotive ISAs?
There is no universal winner. The right choice depends on the workload, required safety level, software stack, supplier strategy, and program schedule. RISC-V’s openness and extensibility may appeal to teams seeking roadmap control or workload-specific designs; a decision still needs to weigh the maturity and evidence available for the actual implementation.
| Decision factor | What to assess |
|---|---|
| Licensing and roadmap control | Who controls the ISA, processor IP, implementation roadmap, and any custom extensions? |
| Automotive IP and safety evidence | Is the chosen core available in a suitable automotive implementation, with the safety documentation and certification support the program requires? |
| Software and AUTOSAR ecosystem | Can the existing software stack, operating systems, AUTOSAR components, and development tools support the target? |
| Real-time behavior | Can the implementation meet timing and determinism requirements under the intended workload? |
| AI and extensions | Do available standard or custom extensions and accelerators fit the application without creating unacceptable software or maintenance burdens? |
| Suppliers and lifecycle | Are there viable sourcing alternatives, and can suppliers support the product for the vehicle’s required lifecycle? |
| Engineering cost and timing | What are the full costs and schedule risks for integration, verification, qualification, tool support, and long-term maintenance? |
What does the 2030 market forecast mean?
Omdia forecast that AI and automotive applications could help RISC-V approach nearly 25% of the processor market by 2030. RISC-V International cited that projection in its 2024 year-in-review blog. It is a forecast reported secondhand, not a measured current market share or a forecast of automotive deployments alone. RISC-V International’s 2024 year-in-review.
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