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Intel began shipping its Agilex FPGAs to early-access customers on August 29, 2019. Microsoft was one of four named participants—not the only recipient—and said it planned to use the chips in upcoming projects. The announcement described engineering work, not a broad or completed Azure deployment.
When did Intel Agilex FPGAs start shipping to Microsoft?
Intel announced on August 29, 2019, that it had started shipping the first Agilex field-programmable gate arrays (FPGAs) to early-access customers. These programmable chips let engineers configure hardware for particular workloads, including networking and data processing. Intel described the shipments as part of customer development work, not as consumer-product availability. Intel’s shipment announcement named four participants.
Which companies received the early-access FPGAs?
- Microsoft
- Colorado Engineering Inc.
- Mantaro Networks
- Silicom
Intel said the customers were developing solutions for networking, 5G, and accelerated data analytics. It did not specify which company was working on each application in the announcement.
What did Microsoft plan to use Agilex for?
Microsoft technical fellow Doug Burger, from Azure Hardware Systems, said Microsoft had worked closely with Intel on Agilex development and was planning to use the FPGAs in several upcoming projects. That statement described future plans, not a confirmed completed deployment of Agilex across Azure.
#1 Best Overall
- FPGA Evaluation Platform: DE25-Standard Development Kit designed for evaluation of Intel Agilex 5E FPGA (A5ED013BB32AE4SR1) for advanced programmable logic applications
- Development and Education Focus: Comprehensive development board from Terasic's DE Series, ideal for learning, prototyping, and testing FPGA-based designs and SoC implementations
- Rich Connectivity Options: Features multiple USB ports, Ethernet, audio jacks (pink, blue, green), GPIO expansion headers, and various interfaces for versatile project development
- Interactive Components: Equipped with onboard buttons, switches, LED displays, and indicators enabling hands-on experimentation and debugging of digital logic designs
- Professional Grade Hardware: Robust construction weighing 2.425 pounds with high-quality PCB design, providing a stable platform for complex FPGA development projects
“Microsoft has been working closely with Intel on the development of their Intel Agilex FPGAs and we are planning to use them in a number of upcoming projects.”
Burger also said Microsoft had already found value in Intel FPGAs for real-time AI, networking, and applications and infrastructure across Azure Cloud Services, Bing, and other data-center services. His comments about those existing FPGA uses should not be read as confirmation that those services were already running on Agilex.
Rank #2
- FPGA Development Platform: Atum A5 Agilex 5 E-Series SoC FPGA development board featuring the A5ED065B chip for advanced programmable logic applications
- Complete Kit: Includes development board, USB and power cables, power supply adapter, and accessories for immediate setup and evaluation
- Connectivity Options: Equipped with FMC+ and MIPI (CSI/CSI-2/DSI/DSI-2) interconnect systems for flexible peripheral and camera interface integration
- Compact Design: Board measures 6.3 inches x 6.1 inches (160 mm x 155 mm), providing a space-efficient platform for FPGA and MCU/MPU SoC development
- USB Interface: Features USB connectivity for easy programming, debugging, and communication with host computer systems
What are Intel Agilex FPGAs designed to do?
Intel introduced the Agilex family in April 2019 for embedded, network, and data-center markets. Its design combined a 10nm FPGA fabric with second-generation HyperFlex architecture and heterogeneous 3D packaging using Intel’s embedded multi-die interconnect bridge (EMIB). Intel said the package could combine FPGA fabric with analog, memory, custom-computing, custom-I/O, and eASIC device tiles. Intel’s family announcement also described interfaces and memory support planned for the portfolio.
Connectivity and memory claims in the 2019 announcements
The announcements listed CXL, PCIe Gen 5, transceiver rates up to 112 Gbps, and support for DDR5, HBM, and Optane DC persistent memory among Agilex family capabilities or plans. The August shipment announcement also listed DDR4 support. These were product-family statements made in 2019; they do not establish that every Agilex device shipped then supported every interface or memory type, nor that capabilities described as upcoming were already available in each device.
Rank #3
- Arty A7 comes in two FPGA variants: Arty A7-35T features Xilinx XC7A35TICSG324-1L. Arty A7-100T features the larger Xilinx XC7A100TCSG324-1.
- Internal clock speeds exceeding 450MHz, On-chip analog-to-digital converter (XADC), Programmable over JTAG and Quad-SPI Flash
- 256MB DDR3L with a 16-bit bus @ 667MHz, 16MB Quad-SPI Flash, USB-JTAG Programming circuitry, Powered from USB or any 7V-15V source
- 10/100 Mbps Ethernet, USB-UART Bridge
- 4 Switches, 4 Buttons, 1 Reset Button, 4 LEDs, 4 RGB LEDs, 4 Pmod connectors, shield connector
How should Intel’s performance and power figures be understood?
Intel’s April 2019 announcement made several quantified claims relative to its own products or under specified configurations. They were vendor figures, not independent benchmark results.
- Up to 40 percent higher performance than Stratix 10: Intel based this on maximum clock speed comparisons using an example design suite; the test results were dated February 2019.
- Up to 40 percent lower total power than Stratix 10: Intel described this as an estimate using its Stratix 10 Early Power Estimator together with internal Agilex analysis, architecture simulation, and modeling, with testing dated February 2019.
- Up to 40 TFLOPs of DSP performance in an FP16 configuration: Intel derived this figure from the maximum planned number of DSP blocks and their maximum specified clock frequency.
These figures describe Intel’s 2019 comparisons, estimates, and specified configuration; they are not evidence of independently measured results or a current comparison with competing FPGA products.
Rank #4
- Altera Cyclone IV FPGA includes 6,000 Logic Elements with two clock multipliers. The Cyclone IV FPGA is the perfect balance of inexpensive cost versus plentiful logic cells, 20KBytes of SRAM, and General Purpose Input/Output pins. This is a great board to learn how to program FPGA's.
- Built in programmer cable allows configuring the FPGA with a single USB-C cable. The DPL can be powered from the USB cable or from the Barrel Connector. A separate JTAG header can also be used to program the FPGA using a compatible USB Blaster cable.
- 6x6 LED Array allows character and animations to be displayed at ultra fast speed. LED blocks can be individually turned on/off to allow LED signals to be used as I/O's
- 70 Inputs/Outputs originating at the FPGA are available at Stackable Headers organized around the edge of the board. The user can configure these I/O's using the FPGA project code.
- The DPL contains two oscillators, 66MHz and 100MHz. The 66MHz oscillator is used to provide clocking for the EPT ActiveHost USB communications core. The 100MHz oscillator can be used by the user clocked up using one of the onboard Clock-DLL modules.
Does Microsoft’s current Azure NP-series use these Agilex FPGAs?
Microsoft’s current Azure NP-series documentation identifies Intel Xeon 8171M CPUs paired with AMD Xilinx Alveo U250 FPGAs, not Agilex. Microsoft lists NP-series retirement as scheduled for May 31, 2027. That separate product documentation does not establish that the 2019 Agilex devices power NP-series virtual machines.
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In a 2024 portfolio update, Intel discussed Agilex development kits and software support as part of its FPGA offerings. Intel said production shipments of Agilex 3 were expected to begin in mid-2025. This establishes a later development-kit path, but does not confirm current stock for a particular board or compatibility between those kits and the first Agilex devices announced in 2019. Intel’s 2024 portfolio update provides that later context.
Quick Recap
Best Value
- Designed for students and beginners looking to understand Digital Logic, fundamentals of FPGAs
- Features the Xilinx Artix 7 FPGA compatible with Vivado Design Suite WebPACK Edition (free download available from Xilinx)
- On board user interfaces include 16 user switches, 16 LEDs, 5 user pushbuttons, and a
- Expansion opportunities with four Pmod ports including 3 standard 12-pin Pmod ports and 1 dual
- Does NOT ship with micro USB cable
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