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India’s semiconductor push combines incentives for fabs and packaging with support for chip design, skills and research. The original Semicon India Programme launched in December 2021 with a ₹76,000 crore outlay; a separate India Semiconductor Mission 2.0 was announced in the Union Budget for 2026–27 with an initial ₹1,000 crore allocation. Those are different programme stages and budgets—not one $13 billion fund. As of June 2026, the government reported 12 approved projects, but approval and investment commitments do not mean all facilities are built or producing.
What is India’s semiconductor mission?
“India’s semiconductor mission” refers to a set of government-backed programmes intended to develop more of the chip industry in India. The first major funding framework was the Semicon India Programme, launched in December 2021. Its ₹76,000 crore outlay covered semiconductor and display fabrication, packaging and testing, chip design, talent development and research collaborations, according to the Government of India’s December 2021 announcement.
India Semiconductor Mission 2.0 is a later initiative, announced in the Union Budget for 2026–27. Its reported initial allocation is ₹1,000 crore for that fiscal year. The new mission emphasizes equipment and materials, indigenous intellectual property, resilient supply chains, research, training and advanced manufacturing. That allocation is not an additional description of the original programme’s ₹76,000 crore outlay, nor does it establish the total amount that may be allocated to ISM 2.0 over time.
How much is India investing in semiconductor manufacturing?
The ₹76,000 crore figure is the original programme’s government outlay, not a tally of money already spent on factories. A separate figure measures proposed private and project investment: in June 2026, the Press Information Bureau (PIB) reported 12 approved projects with approximately ₹1.64 lakh crore in investment commitments. Commitments are not the same as realized spending.
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It is therefore useful to keep three kinds of figures separate:
- Programme outlay: government funding set aside or announced for a programme, such as the original ₹76,000 crore.
- Project investment commitment: an announced investment associated with approved projects, such as the approximately ₹1.64 lakh crore reported in June 2026.
- Production status: whether a facility has reached pilot or commercial production. Neither an outlay nor a commitment proves that it has.
What kinds of projects are supported?
The portfolio is broader than leading-edge silicon logic-chip fabrication. It includes wafer fabrication, compound-semiconductor devices, packaging and testing, and support for chip design. The original scheme’s announced incentive rates vary by project category and eligibility:
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| Project category | Announced support under the original scheme | What the figure means |
|---|---|---|
| Eligible semiconductor and display fabs | Up to 50% of project cost | A maximum rate for eligible projects, not an automatic payment to every applicant. |
| Approved compound-semiconductor, silicon-photonics, sensors/MEMS and semiconductor ATMP/OSAT units | 30% of capital expenditure | Applies to specified approved categories under scheme terms. |
| Design Linked Incentive (DLI) | Product-design support of up to 50% of eligible expenditure; product-deployment incentive of 6%–4% of net sales over five years | Design and deployment support with separate eligibility and calculation rules. |
These terms come from the Government of India’s 2021 cabinet-approved scheme announcement. They describe the framework, not a guarantee that any particular project receives the maximum rate; applications and support depend on the scheme’s eligibility criteria and terms.
Manufacturing includes more than wafer fabs
Approved projects include different stages of the semiconductor supply chain. The government’s 2025 cabinet announcement covered a silicon-carbide (SiC) compound-semiconductor project in Odisha, advanced glass-substrate and heterogeneous packaging in Odisha, discrete-semiconductor expansion in Punjab, and system-in-package manufacturing in Andhra Pradesh. These are distinct technologies and manufacturing roles; a packaging unit is not a wafer fab, and a proposed capacity is not actual output.
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A parliamentary annexure listed ten earlier projects and their proposed capacities and investments. It predates the June 2026 count of 12 approvals, so it should not be treated as a complete list of all projects approved by June 2026.
Which projects have been approved, and what is operating?
Reported counts differ because the government releases describe different dates and measures. The June 2026 release counts approved projects; the March 2026 update describes an earlier manufacturing-unit snapshot and production progress. They should not be combined into a single status count.
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| Reporting date and source | What was reported | How to read it |
|---|---|---|
| March 2026, Ministry of Electronics and Information Technology update | Ten approved manufacturing units; one had started commercial production and three were in pilot production. | An earlier snapshot of unit approvals and initial production status. |
| June 2026, PIB | 12 approved projects: one semiconductor fab, two compound-semiconductor fabs and nine packaging units, with about ₹1.64 lakh crore in investment commitments. | A later approval count and commitment total; it does not state that all 12 are operating. |
The June 2026 project categories show why “12 approved projects” should not be read as “12 chip fabs.” The mix includes packaging units and compound-semiconductor fabs alongside one semiconductor fab. The available government figures establish approvals and some early production, but do not provide a complete project-by-project account of construction, commissioning or output.
How does the mission support chip design?
The Design Linked Incentive scheme is the design-side complement to manufacturing support. It is intended to help eligible companies develop chips and system-on-chip (SoC) products, access design infrastructure and take products toward deployment. Government-reported results show several distinct measures, which should not be conflated:
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- In a March 2026 update, the Ministry of Electronics and Information Technology reported 24 approved chip and SoC design projects with a combined project value of ₹900 crore.
- The same update said 105 fabless design companies had access to infrastructure, including electronic-design-automation (EDA) tools, and students at 315 universities had access to advanced EDA tools.
- It reported seven fabricated chips from 16 tape-outs. A tape-out is the point at which a completed chip design is sent for fabrication; it is not itself proof of a commercially deployed product.
- A separate PIB report in June 2026, describing status as of March 2026, said 24 companies had received DLI fiscal support and 105 applicants had EDA-tool support. Those are support and access measures, not the same as the 24 approved design projects or the 315 universities figure.
The March 2026 government update cited design applications including video surveillance, drone detection, energy metering, microprocessors, satellite communications, broadband and IoT SoCs. These examples indicate the range of intended products; they do not establish commercial adoption or market scale.
What does India Semiconductor Mission 2.0 change?
ISM 2.0 broadens the policy emphasis toward the inputs and capabilities needed to sustain manufacturing: equipment, materials, domestic IP, supply-chain resilience, research, training and advanced manufacturing. Its initial ₹1,000 crore allocation for FY 2026–27 is the budget figure reported with the Union Budget announcement. It should be distinguished from both the original programme’s ₹76,000 crore outlay and the investment commitments attached to approved projects.
The announcement signals a policy focus, but the allocation alone does not specify how much will reach each area, how many new facilities will result, or what output they will achieve. The available figures do not establish an independent assessment of the programme’s economic additionality, total realized investment or domestic demand for chips.
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For any project or headline figure, check what is being counted and when. A useful assessment separates:
- Project stage: approval, construction, pilot production or commercial production.
- Manufacturing role: wafer fab, compound-device fabrication, packaging and testing, or design.
- Technology and product: for example, silicon, SiC, discrete devices, glass-substrate packaging or system-in-package.
- Measure: proposed capacity, investment commitment, actual investment or reported production output. These are not interchangeable.
- Support: the eligible incentive category and terms, rather than the headline maximum alone.
For readers new to the subject, the official “Introduction to Semiconductors” course is presented as free, self-paced microlearning and a joint initiative of India Semiconductor Mission, MeitY and Intel India. It provides introductory context, not evidence about project performance.
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