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CoreLab says a reusable, open-architecture platform could reduce the cost of entering custom AI-chip development by 75% or more. That is a target, not a verified saving: the company has not published audited cost comparisons or production results. Its CoreLab–Tenstorrent Atlantis platform is an early example of the approach, aimed at robotics and automotive edge computing.
How CoreLab says it can lower the cost of a custom AI chip
Custom high-performance compute chips have traditionally required IP budgets exceeding $100 million, according to CoreLab founder Allen Wu in an EE Times interview published March 5, 2026. CoreLab’s stated goal is to reduce the entry cost by 75% or more by reusing a platform instead of building every part of a chip stack from scratch.
The proposed saving comes from sharing reusable processor IP, system solutions, and design and integration work across projects. A customer could customize that foundation for a particular workload rather than fund an entirely bespoke set of components and supporting infrastructure. In principle, reuse can reduce duplicated development; the available figures do not establish a specific price for a customer project.
CoreLab has not shown that the target has been achieved in production. The more-than-$100-million figure is a broad traditional-budget threshold reported by EE Times, not a quote for every chip program or a guaranteed starting price for a CoreLab customer.
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What CoreLab means by an open, heterogeneous AI processor
CoreLab’s concept is not a single processor architecture or a claim that every component must use RISC-V. RISC-V serves as a baseline and interoperability strategy, while the platform is intended to support multiple architectures. A system could combine general-purpose CPU cores, CUDA-type GPU cores, and domain-specific accelerators (DSAs) selected for a workload.
Wu described the direction to EE Times as a “custom fusion processor (XPU).” The practical idea is to assemble compute elements around an application rather than rely on one processor type for every task. CoreLab likens its intended platform role to Android or Linux: shared foundations that can be adapted, rather than a finished chip design that every customer must use unchanged.
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The company points especially to physical AI applications such as robotics and autonomous systems. These systems may use changing software approaches, including vision-language-action models and world models. CoreLab’s argument is that a reusable, modular hardware platform could make it easier to adapt the compute mix as those workloads evolve. That is the company’s rationale, not an independently demonstrated performance or development-time result.
What the Atlantis platform includes
CoreLab and Tenstorrent announced their Atlantis partnership on September 25, 2025. Their release describes a platform combining Tenstorrent RISC-V CPU IP with CoreLab energy-efficient IP and system-on-chip (SoC) solutions for robotics and automotive edge applications. The release presents deep customization, low total cost of ownership, and safety-ready CPU IP as design goals.
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- Powered by 26 Tera-Operations Per Second (TOPS) Hailo-8 AI Processor.
- 2.5W typical power consumption
- Enabling real-time low latency and high-efficiency AI inferencing on the edge devices
- Supports TensorFlow TensorFlow Lite, ONNX, Keras, Pytorch frameworks
- Supports Linux and Windows.
EE Times reports that the first concrete Atlantis implementation is built around eight Tenstorrent high-performance cores. It adds CoreLab RISC-V real-time security and power-management IP, and includes an open PCIe slot for accelerator cards. That expansion path is intended to let engineers experiment with accelerators before committing to a full SoC.
Atlantis is therefore a CoreLab–Tenstorrent platform, not simply a Tenstorrent chip under another name. The partnership release quotes Tenstorrent CEO Jim Keller saying its joint mission is to bring RISC-V to more markets; CoreLab chairman Allen Wu describes the effort as part of the company’s focus on open-architecture custom processors.
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Does CoreLab sell IP or a complete chip-design service?
EE Times reports two customer routes: license CoreLab IP outright or purchase a turnkey solution. CoreLab’s website describes a broader service offering that includes processor customization, end-to-end design, integration and testing, technical support, flexible licensing, RISC-V core IP, system solutions, and design services.
- IP licensing: A customer licenses processor or other IP and uses it as part of its own design program.
- Turnkey solution: A customer buys a more complete design and integration offering from CoreLab.
The appropriate route depends on how much of the processor and SoC work a customer intends to own and staff itself. The published material does not state licensing fees, turnkey prices, or the division of engineering responsibilities for a particular engagement.
When will the Atlantis development board be available?
EE Times reports that Atlantis development boards are planned for Q4 2026. That is a development-board target, not confirmation that boards are currently available to buy. The available information does not establish a retail launch date or an Amazon listing or product SKU.
What remains unproven about cost and readiness
The announced platform and cost-reduction target are not the same as demonstrated production results. The cited sources do not provide independently audited benchmarks, customer deployment data, pricing, tape-out status, or evidence that CoreLab has already delivered the stated 75% or greater saving. They also do not establish production performance for Atlantis. Buyers evaluating a program would need project-specific cost and schedule information, plus evidence relevant to their workload and production requirements.
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