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Virtual Error Cancellation (VEC) is a proposed way to reduce residual errors in estimates from logical quantum circuits by reprocessing their syndrome records after a circuit runs. It does not change the circuit itself. The reported improvement comes from numerical simulations—not a demonstration on a running quantum processor.
What Virtual Error Cancellation does
In a logical quantum circuit, an error-correction code encodes information across multiple physical qubits. Measurements called syndromes provide clues about errors during execution. A decoder interprets those records to estimate what went wrong, but a fast decoder can leave residual logical errors that affect the final estimate.
In “Measure Now, Mitigate Later,” Oles Shtanko, Saswata Roy, Shashwat Kumar, and Zlatko Minev propose using syndrome information for additional classical post-processing. VEC assigns syndrome-dependent weights to the estimates, aiming to mitigate residual logical error after execution. The proposal does not require changing the quantum circuit or, as described by the authors, learning the noise in advance. Read the preprint on arXiv.
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VEC pairs a decoder suited to low-latency use during an experiment with a more computationally intensive offline decoder. The first decoder provides a practical result quickly; the second supplies a more detailed reference for later analysis. Syndrome-dependent weights then use that reference information to adjust the estimates.
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- During execution: a lookup-table implementation of a real-time minimum-weight perfect matching decoder processes syndrome information.
- After execution: an offline reference decoder uses exact matrix-product-state contraction, a more complex computation described in the methods.
- For estimation: the syndrome-dependent post-processing reweights estimates to target errors left by the fast decoding stage.
This is a proposed research workflow, not evidence of a commercial service or a publicly available implementation.
What the reported results show—and do not show
The preprint reports numerical simulations of a distance-7 rotated surface code. Its abstract says the dual-decoder approach can achieve more than three orders of magnitude of suppression compared with the decoded logical error rate in an experimentally achievable setting. That figure is a simulation result attributed to the authors, not a measured improvement on quantum hardware.
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A secondary report describes a more specific benchmark: over 1,600-fold reduction relative to unmitigated decoding in a distance-7 code-capacity simulation at physical error rate p = 0.005. The figure applies to those simulation conditions; it should not be generalized to other codes, circuits, noise models, or processors. The report also states that the method has not been demonstrated on a quantum processor. Read the benchmark report.
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The preprint was submitted to arXiv on October 8, 2026. The sources cited here do not establish later peer review, hardware validation, or a public implementation. The key distinction is between reducing logical error in a numerical model and showing the same reduction in a live processor.
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How VEC differs from other error-mitigation approaches
VEC’s defining feature is that it uses logical-circuit syndrome records after execution, combining a fast decoder with an offline reference decoder. A useful comparison with other methods should check how each handles circuits, noise information, and measurement data—not assume a universal ranking.
- Where it acts: VEC is post-execution classical processing; it does not modify the circuit run.
- Noise characterization: the authors describe VEC as not requiring prior noise learning.
- Use of shots: VEC is described in terms of syndrome-dependent reweighting rather than simply discarding shots. The cited material does not provide a general sampling-overhead figure.
- Evidence: the reported VEC performance is numerical simulation. Comparisons with methods tested on hardware are not like-for-like unless code, noise model, decoder, and shot budget also match.
Has Google demonstrated VEC on a quantum computer?
The cited evidence does not show a VEC demonstration on a running quantum processor. It documents a research proposal and simulation results for a distance-7 rotated surface code. The reported reductions therefore describe what the method achieved in the stated simulations, not an observed hardware result.
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