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Some 7-nm processes used EUV, but “7 nm” did not mean that every chipmaker used EUV—or that every layer was patterned with it. TSMC’s roadmap makes the distinction clear: its N7 FinFET entered volume production in 2018, while its explicitly EUV-enabled N7+ entered volume production in the second quarter of 2019. High-NA EUV is a later technology step; a 2024 prototype and a forecast for manufacturing were not proof of broad production adoption.
Did 7-nm processes use EUV?
Some did, and some did not. “7 nm” is a process-generation label, not a guarantee of a particular lithography method, a specific set of EUV-patterned layers, or a uniform process across foundries. EUV can be introduced on selected layers; the node name alone does not tell you which layers use it.
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TSMC provides a useful, specifically documented comparison. It says its original N7 FinFET began volume production in 2018, then describes N7+ as built on N7 and EUV-enabled. That distinction is a reason not to treat “7 nm” and “EUV” as interchangeable terms, or to assume every vendor’s 7-nm process matched TSMC’s implementation. TSMC’s 7-nm technology page and its N7+ announcement document the two variants.
What is the difference between TSMC N7 and N7+?
| Process | What TSMC says | Production milestone |
|---|---|---|
| N7 FinFET | TSMC’s original 7-nm node; the company’s cited page does not identify it as the EUV-enabled variant. | Volume production began in 2018, according to TSMC. |
| N7+ | A later process built on N7 and explicitly described by TSMC as EUV-enabled. | Volume production began in Q2 2019. In an October 7, 2019 announcement, TSMC said N7+ was delivering customer products in high volume and called it its first commercially available EUV lithography technology delivering products to market in high volume. TSMC announcement. |
TSMC also reported that N7+ offered 15–20% more density than N7 and improved power consumption. Those are the company’s stated comparisons, not independent measurements; its announcement did not give a single percentage for the power improvement. It said N7+ yields were similar to N7 after more than a year of N7 volume production. TSMC’s announcement.
When did EUV first reach volume production?
The answer depends on the scope of “first.” In the evidence cited here, TSMC’s October 2019 announcement identifies its N7+ as its first commercially available EUV lithography technology delivering customer products in high volume, with volume production starting in Q2 2019. That supports a precise statement about TSMC and N7+, not a blanket claim about every foundry or 7-nm process worldwide.
Earlier statements described preparation and qualification rather than the same production milestone. In November 2018, ASML said customers were preparing for an EUV ramp at the 7-nm logic node, with system deliveries and qualification underway. It also discussed EUV adoption growing by layer. This was a supplier’s account of customer preparations and expectations at that time—not proof that all 7-nm processes had adopted EUV. ASML’s November 8, 2018 statement.
How to read the 7-nm-to-High-NA roadmap
These milestones describe different things: a foundry’s node entering volume production, a supplier’s customers preparing systems for a ramp, and a research lab demonstrating a prototype. Keeping the source, date, process variant, and milestone together prevents a roadmap expectation from being mistaken for a production fact.
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| Date | Milestone | What it establishes |
|---|---|---|
| 2018 | TSMC N7 volume production | A foundry-reported production milestone for original N7, not evidence that all 7-nm nodes used the same lithography. TSMC. |
| November 2018 | ASML described customers preparing for EUV ramp at the 7-nm logic node | A dated supplier statement about preparations, qualification, and expected adoption by layer. ASML. |
| Q2 2019 | TSMC N7+ volume production | A foundry-reported EUV-enabled process milestone; the October announcement also said products were reaching the market in high volume. TSMC. |
| 2022 | Imec described EUV on more production lines and a roadmap toward smaller nodes, with High-NA as a later scaling step | A research-institute roadmap view, not a schedule or process naming scheme shared by every manufacturer. imec. |
| June 2024 | ASML and imec opened a High-NA EUV lab with a 0.55-NA prototype | Access for industry participants to process-development equipment and a reported exposure result—not proof of broad High-NA production adoption. ASML and imec. |
What changes with High-NA EUV?
High-NA is the next optical generation after conventional 0.33 numerical-aperture EUV. The 0.55-NA systems are intended to support smaller features, but they are not simply a drop-in synonym for the EUV used in earlier production roadmaps.
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In 2018, imec and ASML described the 0.33-NA NXE:3400B as a production-dedicated scanner. Their collaboration announcement reported a 250-W light source and throughput above 125 wafers per hour for that specific system, describing throughput as an important requirement for high-volume manufacturing. The same announcement described a planned 0.55-NA EXE:5000 for a research lab; those NXE:3400B performance figures should not be applied to the High-NA prototype. imec and ASML, October 22, 2018.
At the High-NA lab opening in June 2024, ASML and imec reported that the TWINSCAN EXE:5000 prototype had exposed 10-nm dense lines at 20-nm pitch using metal-oxide resist. They said industry participants could use the lab for process development and anticipated High-NA high-volume manufacturing in the 2025–2026 timeframe. That was a forecast made in 2024, not a verified statement of current worldwide adoption. ASML and imec’s lab announcement.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.Why a scanner alone does not make an EUV process
Production lithography depends on an integrated process, not just the scanner. The 2018 collaboration described work on defects, reliability, yield, overlay, and metrology alongside the 0.33-NA system. The 2024 High-NA lab announcement describes a wider ecosystem that includes masks, resist and underlayer materials, metrology and inspection, imaging, optical proximity correction, and coordinated patterning and etch work. A prototype exposure therefore marks progress in process development, but does not by itself establish that a complete process is ready for volume production. imec and ASML’s 2018 collaboration account; their 2024 High-NA lab announcement.
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