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Day 2 of DAC 2024 put electronic-design automation in a broader chips-to-systems frame: AI, chiplets, networking, memory, autonomous systems and security are making design a system-level challenge, not just a collection of isolated tools. The day’s coverage also highlighted GenAI-oriented EDA startups Silimate and PrimisAI, alongside established industry voices.
What happened on Day 2 of DAC 2024?
DAC 2024 was presented as the “chips to systems conference,” extending the conversation beyond conventional EDA into AI, autonomous systems, security, chiplets and system-level design. The Day 2 coverage brought together perspectives from Siemens EDA, Cadence, Baya Systems and Codasip, as well as Verific and the startups Silimate and PrimisAI.
The broader conference numbers help explain that emphasis. In its July 31, 2024 release, the Design Automation Conference reported 6,286 total attendee registrations, an 8% increase in attendance, and AI sessions representing 13% of the conference. It also reported increases of 34% in research-track submissions and 32% in Engineering Track submissions, and approximately 150 leading and emerging EDA, silicon, IP and design-services providers in the exhibition and suite area.
| DAC 2024 measure | Reported figure | Source and qualification |
|---|---|---|
| Total attendee registrations | 6,286 | Design Automation Conference official release, July 31, 2024 |
| Attendance change | Up 8% | Design Automation Conference official release, July 31, 2024; the release’s stated comparison period is not specified here |
| AI sessions | 13% of the conference | Design Automation Conference official release, July 31, 2024 |
| Research-track submissions | Up 34% | Design Automation Conference official release, July 31, 2024; the release’s stated comparison period is not specified here |
| Engineering Track submissions | Up 32% | Design Automation Conference official release, July 31, 2024; the release’s stated comparison period is not specified here |
| Exhibition and suite providers | Approximately 150 | Design Automation Conference official release, July 31, 2024; includes EDA, silicon, IP and design-services providers |
Embedded’s recap describes roughly 1,500 technical-paper and presentation submissions and an agenda spanning AI, autonomous systems, security, systems foundry and immersive computing. That range of subjects reflects a conference increasingly concerned with how technologies work together, rather than only with the design of an individual chip.
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Why does EDA need a wider systems context?
EDA tools have traditionally been associated with specific design tasks. The systems-level argument at DAC 2024 is that a chip’s success increasingly depends on surrounding components and constraints: how chiplets connect, how networks move data, how memory supplies it, and how software, security and autonomous-system requirements shape the design.
That is an editorial interpretation of the themes reported from the conference, not a claim that any one company demonstrated a complete system-design solution. A tool optimized for one task may be valuable, but it cannot by itself resolve every integration problem across silicon, interconnects and the system that uses them. The wider view is about coordinating those decisions and their trade-offs.
Siemens EDA CEO Mike Ellow was reported as emphasizing the need for wider context and the democratization of complex-system design with AI tools. The point of democratization is access to capabilities that would otherwise require highly specialized expertise; it does not mean that engineering judgment, verification or accountability cease to matter.
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The Day 2 coverage offers several distinct perspectives on interconnected design challenges, rather than a single unified product announcement:
- Networking and memory: Cadence’s Arif Khan discussed these topics, which are central to moving and supplying data in increasingly complex systems.
- Network fabric: Baya Systems contributed a fabric perspective, focusing attention on connectivity across system elements.
- RISC-V and CHERI: Codasip was associated with RISC-V and the new CHERI Alliance. The coverage identifies that connection but does not detail a specific technical announcement or implementation.
- Chiplets: The conference’s broader systems framing treated chiplets as one factor driving multidimensional design and integration needs, not as a standalone solution to them.
Together these topics illustrate why system interoperability matters: decisions about compute, memory and connectivity affect one another. DAC coverage points to that design pressure, but it does not provide quantitative head-to-head product benchmarks or establish that one approach is superior.
Which GenAI EDA startups were highlighted, and what does “EDA 3.0” mean?
DAC coverage highlighted Silimate and PrimisAI as GenAI-oriented EDA startups. Verific veteran Rick Carlson described the trend as the start of “EDA 3.0.” That phrase is an industry characterization of an emerging phase, not an official standard or a defined product category.
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The framing suggests a move beyond conventional tool workflows toward AI-assisted or GenAI-native automation for managing design complexity. It does not establish the capabilities of either startup’s products. The coverage cited here provides no verified figures for their funding, customers, benchmarks or revenue, and does not establish their present product availability or corporate status.
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Outbyte Driver Updater FREEFix the driver behind crashes, sound loss and screen glitchesFind Drivers →Outbyte PC Repair FREEClear out junk files and repair common Windows errorsFree Scan →A useful way to understand the contrast is as a direction of travel, not a measured comparison between specific vendors:
| Design approach | What the distinction means | What the DAC coverage establishes |
|---|---|---|
| Point-tool optimization | Focuses on a specific design task or tool view | Coverage argues for adding broader system context; it does not quantify tool performance |
| System-level breadth | Considers how chips, chiplets, networks, memory and system requirements interact | Reflected in the conference’s chips-to-systems framing and reported topics |
| Human-led workflows | Engineers direct design work and apply expertise | Presented as the established context for design work, not assessed in a comparative study |
| AI-assisted or GenAI-native workflows | Use AI as part of design automation and complexity management | Identified as an industry direction and startup theme; no product-level benchmark is reported |
For an engineering team, the practical questions remain whether a tool fits existing workflows, interoperates with other parts of the design environment, and supports verification, security and traceability. The reported DAC themes make those questions more important; they do not answer them for an individual product.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.What the conference figures do—and do not—show
The official attendance, submission and exhibition figures show a substantial 2024 DAC program and strong participation as reported by the conference. They do not, by themselves, prove that AI tools have improved design outcomes or that GenAI-native EDA is ready to replace established workflows.
Vivek De, Intel executive and DAC 2024 General Chair, said the expanded program and exhibition reflected the industry’s dynamic nature and DAC’s role as a venue for innovation and collaboration. That is the conference chair’s characterization of the event, rather than an independent assessment of any particular technology.
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