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Analog Devices’ ADM1266 is a programmable power-supervision and sequencing IC for systems with many dependent voltage rails. It monitors external supplies, controls converter enables and resets, sequences startup and shutdown, supports voltage margining, communicates over PMBus, and stores configured fault information. It does not generate power itself: external regulators, switches, inductors, and protection circuits remain part of the design.
The device was introduced in the October 16, 2018 coverage from All About Circuits, so “new” is historical wording rather than a 2026 launch claim. Analog Devices currently lists the ADM1266 as Recommended for New Designs; its product page showed a 1,000-unit starting list-price signal of $17.71 when checked August 18, 2026.
Why multi-rail systems need more than delays
Processors, FPGAs, DSPs, ASICs, memory devices, and communications hardware often require rails to rise and fall in a defined order. For example, an I/O supply may need to be valid before a processor core supply, while reset remains asserted until both rails are inside their permitted windows.
Four related functions are easy to confuse:
- Sequencing controls when enables, switches, rails, and resets change state.
- Supervision checks whether voltages are missing, too low, too high, or unstable.
- Reset generation holds downstream logic inactive until prerequisites are met.
- Telemetry, margining, and logging measure conditions, deliberately shift a rail for testing, and retain fault information.
An RC delay can provide only a rough time offset. Component tolerance changes the delay, the next rail may start before the previous rail is actually regulated, and the circuit has no natural overvoltage decision, retry policy, fault branch, or diagnostic record. Converter load and startup behavior can also change the real timing. The ADM1266 links measured rail validity to programmable state-machine actions instead.
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What the ADM1266 is—and is not
The ADM1266 is a supervisory controller for external power sources. Its power-tree role is to observe rails and signals, then command external converter enables, load switches, resets, and status lines. It does not replace the converter power stages or determine their current capability, efficiency, thermal performance, compensation, or transient response.
The architecture combines dedicated fault detectors, a programmable sequencing engine, ADC telemetry, DAC margining outputs, control I/O, nonvolatile memory, and communications interfaces. The device uses an Arm Cortex-M3 core internally, but normal operation is intended to come from stored configuration rather than a host processor continuously directing every transition.
ADM1266 resources at a glance
| Resource | What it does |
|---|---|
| 17 supply-fault detector inputs | Checks configured undervoltage and overvoltage windows on external rails. |
| VH1–VH4 | Monitors approximately 0.4 V to 15 V inputs. |
| VP1–VP13 | Monitors approximately 0.4 V to 5 V inputs. |
| 12-bit ADC | Provides supervised-voltage readback and telemetry. |
| Nine 8-bit DAC outputs | Can adjust suitable converter feedback or reference nodes for margining. |
| 16 PDIOs and nine GPIOs | Controls enables, resets, switches, status signals, and external logic. |
| Nonvolatile memory | Stores configuration and configured black-box fault information. |
| Package | 9 mm × 9 mm, 64-lead package. |
Specifications are from the ADM1266 Rev. D datasheet. “Up to 17 supplies” means monitored detector inputs and associated control resources, not 17 complete regulated outputs.
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How monitoring and sequencing work together
Fault detectors establish rail validity
Each configured input can use programmable undervoltage and overvoltage thresholds. Programmable filtering helps reject short glitches, but filtering must be selected carefully: too little filtering can respond to switching noise, while too much can delay a genuine brownout.
The state machine decides the response
The sequencing engine can observe detector results, PDIOs, GPIOs, timers, and other configured events. A typical startup is:
- An auxiliary input becomes valid.
- The ADM1266 asserts the enable for rail A.
- It waits until rail A enters its valid window.
- It enables rail B and keeps reset asserted.
- After all required rails and status inputs are valid, it releases reset or system enable.
The same model can branch to retry, controlled shutdown, reverse-order shutdown, or latch-off when a prerequisite fails. The original 2018 article reports state machines with as many as 1,023 states; that figure should be treated as attributed historical coverage rather than a separately reverified current specification.
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PDIO and GPIO details matter
Before assigning a pin, verify the converter’s active-high or active-low enable convention, required source or sink current, open-drain or push-pull requirements, voltage-domain compatibility, pull-ups, and behavior during reset, configuration failure, and loss of the controller supply. A level translator may be required.
Margining, telemetry, and fault recording
Voltage margining
The nine DACs can shift a compatible converter’s feedback node or reference above or below nominal. This supports production testing, tolerance checks, and characterization of processors, FPGAs, or memory. The DAC connection is not a universal regulation loop: resistor scaling, DAC range and resolution, noise, converter topology, loop stability, and safe operating limits must be designed for each rail.
Black-box fault recording
Configured nonvolatile recording can retain voltage, time, and fault information, helping identify which rail failed first or whether a shutdown was commanded. It is not an oscilloscope or high-speed waveform recorder. Trigger conditions, stored fields, sampling behavior, and memory limits determine what evidence is available.
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PMBus versus the interdevice bus
The ADM1266 supports PMBus over a two-wire I²C/SMBus-family interface for configuration, monitoring, margining, and fault operations. The proprietary interdevice bus serves a different purpose: coordinating multiple ADM1266 devices. PMBus is the host/software path; the interdevice link is the sequencer-to-sequencer coordination path. See AN-1453 for PMBus-based programming and configuration information.
Scaling beyond one device
Analog Devices specifies a single device for systems with up to 17 monitored supplies and describes up to 16 devices expanding a system to as many as 257 supplies through the interdevice bus. The EVAL-ADM1266 documentation describes a 16-rail demonstration and cascaded boards controlling up to 256 separate rails. These numbers are not interchangeable: usable capacity depends on detector allocation, control outputs, interdevice coordination, and the particular board architecture.
Evaluation hardware and bring-up workflow
What you need
- ADM1266-EVALZ evaluation board.
- EVAL-ADP-I2C-USB interface for software communication.
- An external 5 V to 15 V supply; the product page gives 12 V DC as an example.
- A Windows host meeting the current software package requirements.
- The datasheet and UG-1110 evaluation-board guide.
The board demonstrates the controller with 14 ADP1710 linear regulators and two ADP7102 linear regulators. It is a sequencer demonstration platform, not a drop-in high-current processor or FPGA power reference design.
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Configuration sequence
- Install the current ADI Power Studio Systemizer package.
- Connect EVAL-ADP-I2C-USB to the board and apply the permitted input voltage.
- Create or open an ADM1266 configuration and define monitored inputs and nominal voltages.
- Set undervoltage, overvoltage, glitch-filter, and fault-qualification parameters.
- Assign PDIO and GPIO outputs to enables, resets, switches, or status functions.
- Define dependencies, delays, startup and shutdown states, retry behavior, and fault branches.
- Configure DAC margining only where the external feedback network supports it.
- Set fault-recording triggers and telemetry fields.
- Compile the configuration, program or save it as appropriate, and verify readback.
- Test normal startup and shutdown, missing rails, undervoltage, overvoltage, recovery, and communication loss.
- Confirm actual waveforms with an oscilloscope; software telemetry alone cannot prove safe transient behavior.
ADI describes Systemizer as supporting offline configuration as well as hardware-connected measurements and fault-log access. Exact menu labels and operating-system support should be checked against the current release.
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- Prebias and backfeed: Check converter prebiased-start requirements, output discharge, signal-pin backfeeding, and partial-power states.
- Power-down policy: Reverse-order shutdown, minimum off-times, controlled discharge, isolation, and emergency faults require explicit states; power-up logic does not automatically solve them.
- Threshold interpretation: Divider tolerance, leakage, hysteresis, ripple, startup overshoot, and below-ground excursions affect real safety margins.
- Power-good assumptions: A converter’s power-good output may assert before the downstream load is initialized; include external status or logic when “ready” means more than voltage.
- Input-class errors: VH and VP inputs have different voltage limits. Connecting a rail to the wrong input class can violate specifications.
- Configuration integrity: Use production programming procedures, revision control, readback verification, and protection against accidental reprogramming.
- Communication loss: A configured device can run autonomously, but a failed bus removes live telemetry, programming access, and fault readback.
When the ADM1266 is a good choice
- Many heterogeneous rails need conditional startup and coordinated shutdown.
- Fault response must be autonomous rather than dependent on firmware booting first.
- Production or validation requires programmable voltage margining.
- Persistent fault evidence and PMBus access are valuable.
- Several sequencers may need to coordinate.
A simpler reset supervisor is usually better for one or two straightforward rails. An integrated PMIC or multi-output regulator is preferable when converter stages, currents, and voltages are known and board-area reduction dominates. A PMBus power-system manager may fit designs centered on compatible digitally controlled regulators. An MCU or FPGA offers broad flexibility but adds firmware, boot-order, and “who powers the power controller?” concerns.
Related alternatives
The ADM1260 is a lower-resource Analog Devices Super Sequencer, including six 8-bit DACs rather than the ADM1266’s nine. It may suit systems with fewer rails, I/O signals, or margining requirements.
Current product information
Analog Devices’ ADM1266 product page currently marks the part Recommended for New Designs. The $17.71 figure is a 1,000-unit list-price signal observed August 18, 2026—not a guaranteed single-unit or distributor transaction price. Evaluation-board pricing was not established here.
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