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AMD’s “Venice” is a next-generation EPYC server CPU—not an AI accelerator GPU—and AMD said in May 2026 that production was ramping in Taiwan on TSMC’s 2nm process, with Arizona production planned for the future. The announcement does not disclose a purchase order, contract value, production volume, or Arizona start date.

What AMD says it will make with TSMC in Arizona

The named product is Venice, AMD’s next-generation EPYC processor for high-performance computing and data centers. On May 21, 2026, AMD said Venice was ramping on TSMC’s advanced 2nm process in Taiwan and described production at TSMC’s Arizona fab as a future plan. The announcement does not say that Venice production has started in Arizona or give a date for it. AMD’s May 21 announcement

That distinction matters for the headline’s “buy AI chips” wording. AMD described its own EPYC processor being manufactured by TSMC; it did not announce a newly disclosed deal to buy finished AI accelerator chips. The release gives no order quantity, contract value, or purchase-order details.

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Why an EPYC CPU is part of AI infrastructure

AI data centers need more than accelerator chips. AMD says CPUs help coordinate data movement, networking, storage, security, and other system functions as AI workloads grow. Venice is presented as part of that computing foundation.

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So Venice is relevant to AI infrastructure, but AMD’s announcement identifies it as a server CPU, not a dedicated AI accelerator GPU. The announcement does not establish that Venice itself performs the accelerator role typically associated with AI GPUs.

How the Arizona fab plans fit together

TSMC’s Arizona manufacturing plans involve multiple facilities and process technologies. The existing fab, the next planned fab, and the later 2nm-capable facility should not be treated as one site at one stage of readiness.

Facility or stage Process and status Timing stated by the source
Fab 1 Arizona Commerce Authority said the first Arizona fab had been in N4 volume production since late 2024. NIST lists Fab 1 as 4nm and 5nm. Volume production since late 2024, according to the Arizona Commerce Authority’s July 16, 2026 report. NIST’s project profile lists a first-half 2025 target; that is a projected timeline entry, not independent confirmation of completion. Arizona Commerce Authority · NIST project profile
Fab 2 Planned 3nm facility. The Arizona Commerce Authority said it was expected to begin volume production in 2027. NIST lists a second-half 2027 target on its project profile. These are attributed expectations and targets, not confirmation that production has begun. Arizona Commerce Authority · NIST project profile
Fab 3 NIST lists a planned facility for A16 and 2nm processes. NIST’s project profile says Fab 3 is expected by the end of the decade. This is a projected timeline, not confirmation of completion or of Venice production there. NIST project profile

AMD’s May 2026 statement about a future Arizona production ramp does not identify which specific fab or give a Venice production start date. The existence of Arizona facilities and their planned process nodes does not confirm that this CPU is being produced there now.

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What AMD has said about using Arizona fabs

AMD CEO Lisa Su previously said AMD expected to be a significant user of TSMC’s Arizona fabs, at a TSMC Fab 21 milestone. That was a general statement about expected fab use, not a Venice-specific production commitment or a disclosure of product volumes or timing. TSMC’s Fab 21 milestone release

For broader project context, NIST’s Arizona project summary lists $6.6 billion in direct funding, a $5 billion available loan, and expected capital expenditure above $65 billion. Those are figures in NIST’s project summary, accessed October 4, 2026; they describe the project, not an AMD order or Venice investment. NIST project profile

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What is—and is not—confirmed

  • Confirmed by AMD: Venice is a next-generation EPYC processor, and production was ramping on TSMC’s 2nm process in Taiwan in May 2026. AMD described Arizona production as a future plan. AMD announcement
  • Confirmed as facility context: The Arizona Commerce Authority reported the first fab in N4 volume production since late 2024 and the second fab’s 3nm volume production expected in 2027. NIST lists a later Fab 3 for A16 and 2nm, expected by the end of the decade. These sources describe different facilities and schedules. Arizona Commerce Authority · NIST project profile
  • Not disclosed or verified: A Venice Arizona production start date, production volume, Arizona yield, price, or a new purchase contract for finished AI chips.

Venice is therefore best described as an AMD EPYC server CPU whose production was ramping in Taiwan, with Arizona production planned. Calling it an AI chip without explaining its CPU role risks making it sound like a dedicated AI GPU or a newly announced chip-buying deal—neither is established by AMD’s announcement.

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