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Choose the GaN device for the conversion stage
Start with the converter’s input and output ranges, topology, switching conditions, and thermal environment. Then select a device whose voltage rating, current capability, package, and integration style suit that stage. A voltage class that fits one part of a supply may be inappropriate for another.
As examples, a 2025 Texas Instruments (TI) technical article discusses 650 V GaN FETs for AC/DC and DC/DC conversion, and 100 V or 200 V devices for DC/DC conversion. These are examples of device classes, not universal recommendations. The actual bus voltage, expected transients, topology, operating conditions, and each device’s datasheet limits determine the choice.
Also decide whether a discrete transistor or an integrated GaN power device better fits the design. Integration can simplify a high-density layout, but the specific device’s ratings, thermal behavior, and application guidance still govern. Check the datasheet and reference design for the chosen part rather than treating “GaN” as a single interchangeable device category.
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Match the gate drive to the selected FET
Gate bias, drive current, timing, and turn-on and turn-off behavior must be compatible with both the GaN transistor and its driver. Follow the selected device’s datasheet and the driver’s specifications; do not assume that a gate-drive voltage or timing scheme used with a familiar MOSFET will automatically suit a GaN FET.
TI’s 2022 application brief describes using driver outputs and gate resistors to tune switching speed and control noise and ringing in the gate path. That tuning is a tradeoff: switching more aggressively may support lower switching loss, but can also make parasitic effects and interference harder to manage. Choose drive settings in the context of the actual circuit, then verify the resulting waveforms and operation.
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A half-bridge driver is one option when the topology and device call for a discrete driver. TI’s LMG1205 product information, for example, describes a driver for enhancement-mode GaN FETs and MOSFETs in synchronous buck, boost, or half-bridge configurations. It is an example, not a general recommendation. Confirm compatibility with the chosen FET, supply voltages, timing, and switching conditions.
Keep the commutation and gate loops compact
Fast switching makes parasitic inductance and capacitance consequential. In particular, excess inductance in the high-current power loop can contribute to switch-node overshoot, ringing, and increased switching losses. Infineon’s 2025 half-bridge PCB guidance also explains that commutation-path inductance can produce voltage overshoot that stresses a switch beyond its VDS capability.
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Use the selected package’s reference layout and application guidance as the starting point. General layout priorities include:
- Place the switching devices and local power components so the high-current commutation loop is short and compact.
- Keep gate-driver connections close to the FETs and provide a deliberate return path for the gate signal.
- Route signal and power paths with suitable separation and return routing for the specific layout.
- Identify the critical loops for the chosen topology; do not assume a layout pattern transfers unchanged between converters.
TI’s LMG5200 report uses a buck converter to explain the effects of power-loop inductance and says its principles can extend to other DC/DC converters when their critical loops are identified. That is useful guidance, not a substitute for the reference layout of a particular device and package.
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Account for EMI and thermal performance together
Rapid voltage and current transitions can excite parasitic paths and create conducted or radiated interference. In a half bridge, commutation-current transients interacting with parasitic inductance can also contribute to common-mode noise and ringing, as discussed in Infineon’s PCB guidance. EMI performance therefore depends on the complete switching circuit and layout, not just the transistor’s headline switching speed.
TI’s 2018 EMI and thermal report focuses on a 48 V automotive gate-drive supply. It presents optimization tips that can be adapted to other power designs and to SiC or GaN, but its application context should not be mistaken for a universal design result. Evaluate interference in the actual converter, board, enclosure, and operating configuration.
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Thermal design likewise needs to reflect losses in the finished converter and the resistance from the power stage to ambient. TI’s LMG5200 report emphasizes keeping thermal resistance low enough to prevent overheating under worst-case operating conditions. GaN does not eliminate heat generation or thermal management: validate component and assembly temperatures across the intended operating envelope.
Set switching frequency by system-level tradeoffs
Higher switching frequency can reduce the size of inductors, capacitors, and other magnetics. TI identifies higher-frequency operation, smaller passives, and reductions in some switching, gate-drive, and reverse-recovery losses as potential GaN benefits. Those gains depend on the device and implementation; they are not guaranteed by selecting a GaN switch alone.
Frequency also affects switching and gate-drive losses, EMI, magnetic design, control behavior, and thermal limits. In addition, layout parasitics can increase switching loss and overshoot, offsetting some of the intended benefit. Choose a frequency that works for the entire converter, not solely to make its magnetics smaller.
- Define the converter’s operating range, topology, and size and efficiency goals.
- Choose candidate devices and a switching-frequency range based on their specifications and the requirements of the stage.
- Evaluate the associated magnetics, gate-drive behavior, parasitic effects, EMI, control behavior, and thermal performance.
- Validate the design under its intended operating conditions before treating a projected benefit as an achieved result.
Validate the complete supply, not just the switch
GaN’s fast switching makes careful gate drive and PCB design central to the result, and a higher switching frequency can offer smaller passives while introducing system-level tradeoffs. The cited TI and Infineon materials are vendor technical guidance; they do not establish a universal efficiency gain or a suitable design for every supply. No particular input voltage, output voltage, power level, isolation requirement, safety standard, or target efficiency is specified here, so those application requirements must shape the component and topology decisions.
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For a starting point, TI’s TIDA-00785 is an isolated GaN driver reference design described for several power-conversion and control uses. Before adapting any reference hardware, verify that its topology, ratings, design files, and current availability match the intended application.
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