SEMI’s Semiconductor Manufacturing Cybersecurity Consortium (SMCC) and the National Institute of Standards and Technology’s National Cybersecurity Center of Excellence (NCCoE) collaborated on voluntary cybersecurity guidance for semiconductor manufacturing. The NIST Cybersecurity Framework 2.0 community profile is intended to help organizations prioritize security outcomes across manufacturing equipment, operational technology (OT), suppliers and other parts of the sector. NIST’s record identifies it as an initial public draft published February 27, 2025; the comment period closed July 30, 2025.
What is SEMI’s semiconductor cybersecurity initiative?
It is a sector-focused effort to adapt the NIST Cybersecurity Framework (CSF) 2.0 to the needs of semiconductor manufacturing. SEMI’s SMCC worked with NIST’s NCCoE to develop a community profile: a shared set of cybersecurity outcomes that organizations can use to assess and communicate risk. NIST describes the profile as a way to supplement existing risk-management programs, not replace them. NIST’s NCCoE provides the center’s broader context, while the NIST Cybersecurity Framework supplies the underlying framework.
The initiative addresses manufacturing environments, particularly equipment and OT. It is not a profile for protecting chip designs or semiconductor companies’ intellectual property. That distinction comes from Jennifer Lynn, SMCC working-group chair and semiconductor cybersecurity lead at IBM Research, in EE Times’ October 8, 2024 report.
What does the NIST semiconductor manufacturing profile cover?
The profile emphasizes high-level, mission-oriented cybersecurity outcomes rather than prescribing one technical configuration for every factory. Semiconductor manufacturing environments use varied systems, so NIST notes that a single profile cannot capture every technical detail. Organizations are expected to select controls suited to their equipment, operations and risk.
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The practical concern is that manufacturing equipment can remain functionally useful even as aging hardware and software become harder to secure. Lynn described legacy equipment as a particular challenge. The EE Times report also used toxic-gas monitoring as an example of OT whose tampering could create a physical hazard. These are risk illustrations, not evidence of how often incidents occur or reports of a documented attack.
Is the NIST semiconductor manufacturing profile mandatory?
No. NIST presents the community profile as voluntary, risk-based guidance. The sources describing this initiative do not establish it as a regulation or mandatory certification. Its purpose is to help organizations identify and prioritize outcomes; it does not by itself impose a compliance obligation.
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That makes it different from a binding rule: companies can use the profile to inform their own risk programs without treating it as a replacement for applicable legal requirements, existing standards or internal controls. NIST says the profile is meant to complement current cybersecurity standards and industry guidance.
How does the profile relate to SEMI E187 and E188?
The NIST collaboration adds a sector-wide framework to existing semiconductor equipment guidance rather than displacing it. EE Times reports that SEMI already has two relevant standards:
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- SEMI E187, Specification for Cybersecurity of Fab Equipment.
- SEMI E188, Specification for Malware-Free Equipment Integration.
The profile’s broader role is to organize and prioritize cybersecurity outcomes across organizations and their manufacturing ecosystems. E187 and E188 address more specific equipment and integration concerns, as described in the report. The profile should therefore be understood alongside existing standards and each organization’s risk-management program.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.Has NIST finalized the semiconductor manufacturing profile?
The official NIST record identifies NIST IR 8546 as an initial public draft published February 27, 2025, and says its public-comment period closed July 30, 2025. NIST’s community profiles page lists a Semiconductor Community Profile. The official records cited here do not confirm that the initial draft has been replaced by a final version, so it should be described as a draft rather than a finalized profile.
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The publication and comment dates establish the draft’s status and review window; they do not, on their own, establish whether NIST has issued a later final document.
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