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Sonata is an open-source FPGA microcontroller evaluation platform built around the CHERIoT Ibex core. It gives developers a board-based way to explore CHERIoT in embedded, IoT, and operational technology projects, with documented peripherals, a CHERIoT RTOS software flow, and a Verilator simulation option for development without the physical board.
What is the Sonata FPGA board?
Sonata is a microcontroller system designed to evaluate and prototype with CHERIoT Ibex. The lowRISC project targets the Sonata FPGA board and describes the design as open source from PCB through software, with the potential to run on similar systems. The project presents it as a way to work with CHERIoT in embedded, IoT, and operational technology scenarios—not as evidence of a production deployment or a quantified security improvement. lowRISC’s Sonata System repository describes the platform and its scope.
The repository also highlights a development environment with an SDK, examples, and debuggers, aiming to offer conveniences familiar from conventional microcontroller work. Its description of CHERIoT as providing “default security” is project positioning; the cited material does not quantify a security outcome.
Sonata is part of the Sunburst Project, funded by UKRI / DSbD under grant 107540. That grant identifier does not establish a measured outcome or project scale.
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What hardware and software does Sonata include?
The system overview lists I2C, SPI, GPIO, USB, and UART alongside the CHERIoT Ibex core. The release overview is more specific about the base FPGA image: it describes I2C, SPI, and UART for expansion headers and on-board hardware. These are different scopes—the full system peripheral list should not be read as a claim that every listed peripheral is included in that base image. The system repository and Sonata System documentation provide the project and release descriptions.
On the software side, the project provides a build flow for Microsoft’s CHERIoT RTOS and support for Sonata peripheral drivers. The separate sonata-software repository contains build flows and examples, wraps cheriot-rtos, and points developers to the CHERIoT Programmer’s Guide and Sonata System book.
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How do you load CHERIoT firmware onto Sonata?
The documented physical-board workflow uses the sonata board target, builds a project, then transfers its UF2 output through Sonata’s USB mass-storage interface. The CHERIoT RTOS Getting Started guide specifies Sonata system firmware v0.2 or later for this documented workflow. Exact project setup depends on the software project being built; consult the Getting Started guide and the CHERIoT Platform quick-start for their respective instructions.
- Configure the target: set the project’s board target to
sonataas shown in the applicable CHERIoT guide. - Build the firmware: use the project’s documented build command to generate the firmware image, including its UF2 output.
- Connect the board: with system firmware v0.2 or later, connect Sonata so its USB mass-storage volume is available to the computer.
- Transfer the image: copy the generated UF2 file to that volume. The RTOS guide notes that
xmake runcan copy the output when the SONATA volume is mounted at a location the tool detects.
The quick-start article was published June 10, 2024; its period-specific statement that boards “will be on sale soon” is not a current availability update. The project documentation directs board-support questions to NewAE, but current stock and purchase channels are not established by those documents. Check with the project or NewAE for current board availability.
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Can you develop for Sonata without the board?
Yes. The project documents a Verilator simulation of the system for both hardware and software development. It provides a route to explore code without obtaining a physical Sonata board, though it does not reproduce the experience of exercising real board I/O. See the Sonata System documentation for the simulation path.
| Evaluation route | Useful when | What it lets you exercise | What to keep in mind |
|---|---|---|---|
| Physical Sonata FPGA board | You need real board I/O or want to work with connected peripherals. | The board, its base FPGA image, and attached hardware. | Requires access to the Sonata board and a compatible system firmware version for the documented workflow. |
| Verilator simulation | You want to develop hardware or software without the physical board. | The documented simulated system environment. | It is not a substitute for testing real board I/O. The project materials do not provide a controlled speed, fidelity, or cost comparison with board use. |
The CHERIoT Platform article also mentions the Arty A7 as another FPGA target for CHERIoT. It is an ecosystem alternative, not a Sonata board, and the cited material does not establish that it has the same peripherals or capabilities.
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