Openchip’s strategy is to build modular RISC-V computing systems for AI and high-performance computing, then spread workloads across cloud, on-premises and edge locations instead of relying only on ever-larger, monolithic systems. The company argues that this approach can make AI more energy-aware and easier to adapt—but its public milestones so far establish a functional processor and a development roadmap, not independently measured energy savings or a shipping, production-scale AI accelerator.
What Openchip is building
Openchip is a Barcelona-founded European semiconductor company working across processors, accelerators and software. It focuses on energy-efficient RISC-V systems-on-chip and AI and high-performance-computing (HPC) systems. The company presents European digital sovereignty, security, scalability and sustainability as goals of that work.
Openchip says it was founded in 2021, launched operations in 2023, built its executive team in 2024 and entered intensive research and development in 2025. Its architecture plans use chiplets—separately designed silicon components that can be combined in a larger system—and are intended to serve computing needs from data centers to on-premises installations and edge devices.
What “distributed, energy-aware AI” means
Openchip CEO Cesc Guim describes a shift “from monolithic AI models toward highly distributed systems,” arguing that “It’s not about scaling bigger anymore; it’s about scaling smarter.” In practical terms, the strategy joins two ideas: split computing across cooperating models or systems, and match where and when work runs to available resources and energy.
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| Approach | How work is organized | Potential energy implication | What Openchip’s material establishes |
|---|---|---|---|
| Monolithic model or system | Concentrates much of the workload in one large model or computing system. | Centralized compute may be straightforward to operate, but Openchip’s publicly described material does not provide a direct energy comparison with distributed systems. | Guim identifies this as the approach Openchip expects AI systems to move beyond; no specific competing product is assessed. |
| Distributed systems | Uses multiple cooperating models or computing resources, potentially across cloud, on-premises and edge locations. | Work could be placed where capacity or energy is more suitable, but coordinating resources and moving data also affect total energy use. | Openchip describes this as a direction for its architecture, not as a demonstrated comparative result. |
Scheduling compute around energy
Guim has proposed throttling computing activity according to grid availability and moving inference—the use of a trained model to produce an answer—toward locations with renewable energy. These are operating principles, not evidence that Openchip systems already perform grid-responsive scheduling or have measured lower emissions. The real benefit would depend on the workload, the available energy, the distance data must travel and the extra coordination required.
Using compression and resources selectively
Openchip’s sustainability description emphasizes resource optimization and compression to reduce power consumption. Compression can reduce the amount of data or computation required in some workloads, but its value depends on the method and the task. Openchip’s publicly described material does not specify an Openchip compression technique, quantify its effect or report a workload-by-workload power comparison.
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- Dual-Brain Hybrid Power: Combines the Qualcomm Dragonwing QRB2210 MPU (Quad-core Arm Cortex-A53 @ 2.0 GHz CPU, Adreno GPU, AI acceleration) and the real-time, low-power STM32U585 MCU for advanced applications like object recognition, voice commands, and motion detection.
- AI & Linux Capabilities: Unlocks AI-powered vision and sound solutions; runs Linux Debian OS for coding in Python and supports the Arduino ecosystem with libraries and Sketches; quick start with Arduino App Lab.
- Advanced Features: Equipped with 2 GB LPDDR4 RAM, 16 GB eMMC built-in storage, ideal to develop in PC-connected mode, running the OS, Python scripts, and basic network services (SSH) without a demanding GUI or heavy multitasking; great for lightweight AI and memory-optimized TinyML applications, needing local storage for basic OS and core libraries. Dual-band Wi-Fi 5 (2.4/5 GHz), Bluetooth 5.1, and high-speed headers for vision, audio, and display peripherals.
- Seamless Expansion & Connectivity: Features the classic UNO form factor for shields compatibility, an 8x13 LED matrix, and a Qwiic connector for easy expansion with Modulino nodes; power and connect via the USB-C connector.
- Intended Use & Development: The perfect platform for prototyping robotics or IoT projects, empowering innovators with a unified development experience to mix Arduino Sketches, Python scripts, and containerized AI models in a single interface.
Traceability and verification
Guim also proposes making models traceable and verifiable. That addresses trust and accountability rather than energy use directly: a system that can establish which model performed a task and how it was used may be easier to govern. The proposal should not be mistaken for a published Openchip verification feature or a completed product capability.
Is BER10 a product you can buy?
No shipping or retail availability is established in the company’s BER10 announcement. Openchip says it started from scratch in early 2024, taped out its first chip in 2025 and has a functional 64-bit RISC-V processor capable of running Linux. The announcement describes the processor as built with a sub-2nm Gate-All-Around process.
Rank #3
- Single core ARM Cortex-A7 32-bit core, integrated with NEON and FPU
- Built in Micro's self-developed 4th generation NPU, with high computational accuracy and support for mixed quantization of int4, int8, and int16. Among them, int8 has a computing power of 0.5 TOPS and int4 has a computing power of up to 1.0 TOPS
- Built in self-developed 3rd generation ISP3.2, supports 4 million pixels, and supports various image enhancement and correction algorithms such as HDR, WDR, and multi-level denoisin
- It has powerful encoding performance, supports intelligent encoding, adapts to save bit rates according to the scene, and saves more than 50% of the bit rate compared to conventional CBR mode, making the captured images high-definition, smaller in size, and doubling the storage space
- The design with built-in RISC-V MCU supports low-power fast startup, 250ms fast capture, and simultaneous loading of AI model library, enabling facial recognition to be completed within 1 second
BER10 is presented as a foundation for future RISC-V accelerators aimed at supercomputing and data-center AI. A tape-out and functional Linux-capable processor are meaningful development milestones, but they do not by themselves establish volume production, production performance, commercial availability or measured energy efficiency. The announcement is roadmap and silicon-maturity evidence, not a benchmark or a product launch.
Which partnerships support the strategy?
| Partner or program | What was announced | What it contributes to the strategy |
|---|---|---|
| imec | A 2025 strategic memorandum covers chiplet integration, advanced packaging and full-stack AI co-design. Steven Latré joined Openchip as chief AI and software systems officer. | Research and engineering collaboration around integrating chiplets and designing hardware and software together. |
| Kalray | A May 2025 agreement covers a €4 million non-exclusive IP license, including €2 million payable immediately, for development of a data processing unit (DPU) for next-generation HPC and AI systems. A second phase in July 2025 addressed services for future AI gigafactories. | Licensed IP and related development work for a planned DPU; the agreement does not itself establish that the DPU is shipping. |
| Baya Systems | A June 2026 partnership uses software-driven, chiplet-ready fabric IP to model and validate data movement before silicon. | Pre-silicon modeling intended to support power, performance and area (PPA) optimization. |
| European Commission IPCEI project | Openchip says it was selected for an Important Project of Common European Interest (IPCEI) project to design accelerator chips. | Connects the accelerator effort to the company’s stated aim of supporting European advanced-computing sovereignty. |
What the strategy could mean—and what remains unproven
Openchip’s approach is aimed at a real design question: AI systems do not have to run every task on one large, centralized model or processor. A mix of chiplets, processors, accelerators and software could allow system designers to select different resources for different jobs and locations. Whether that improves efficiency depends on the full system, not just the processor architecture.
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- Architecture: Openchip describes chiplet-based RISC-V systems that can scale from data centers to edge deployments. Its announcements establish direction and development activity, not a commercially deployed product range.
- Energy: Scheduling around grid conditions, using renewable-energy locations and applying compression are proposed ways to reduce energy use. No independent Openchip energy benchmarks are provided.
- Trust and sovereignty: Traceability and verifiability are stated principles, while European sovereignty is a company goal and part of its stated rationale for accelerator development. The material does not establish a specific security certification or guarantee of data residency.
- Maturity: BER10 marks a functional processor milestone, with partner programs addressing IP, packaging and system design. The available milestones do not demonstrate volume production or production-scale AI performance.
How to assess Openchip’s progress
For readers evaluating whether the strategy is becoming a usable platform, the most informative next evidence would be production status for BER10 or its successors, details of a deliverable accelerator, and measured results for representative workloads. Energy claims would be easier to judge with published methods and comparisons that specify the workload, system configuration, power boundary and operating conditions. Until then, Openchip is best understood as a company pursuing a distributed, energy-conscious architecture with an early silicon milestone and an active partnership ecosystem—not as a proven supplier of production AI accelerators.
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