An electro-optical circuit board combines ordinary copper circuitry with optical waveguides that carry data as light. In one documented research design, a planar glass layer containing waveguides is embedded inside a printed-circuit-board stack, then precisely aligned and coupled to photonic chips. Making that design therefore involves both PCB fabrication and optoelectronic packaging; it is a research architecture, not a universal recipe or evidence that this construction is widely deployed commercially.
What is an electro-optical circuit board?
An electro-optical circuit board (EOCB) brings two kinds of signal routing onto or into one board. Copper traces carry electrical signals; optical waveguides guide light between photonic components or board-level endpoints. The board still has a conventional electrical structure, but its optical paths must also be fabricated, exposed at connection points, aligned to components, and tested.
A Fraunhofer IZM paper describes one specific approach: embedding a planar glass waveguide core in a PCB stack that also contains prepreg and FR-4. The paper calls the glass the core layer of its EOCB stack-up. Other optical-board designs can use different optical media or place connections on the surface or at the board edge, so the glass-core process should not be treated as a standard construction for every EOCB.
How is a glass-waveguide EOCB made?
The documented process is best understood as a coordinated sequence: define the electrical and optical layout, make the optical core, integrate it into the board, attach and align photonic components, and verify the assembled links.
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1. Define the electrical and optical architecture
Designers first determine which signals travel electrically and which travel optically, and where photonic integrated circuits, optical engines, fibers, or board-to-board connections will meet the board. In the Fraunhofer design, the glass core is intended to provide single-mode optical routing between silicon photonic devices. The paper discusses 1310 nm and 1550 nm silicon-photonic waveguides as possible device interfaces; these wavelengths describe that research context, not a universal EOCB requirement.
The optical route must reach accessible interfaces, while the copper layers and other board structures still need to satisfy the electrical design. That makes the stack-up and component-interface decisions interdependent: a route that works optically must also fit the board construction and assembly plan.
2. Fabricate the glass optical core
The glass layer serves as the optical core. In the described approach, waveguides and electrical pads are patterned on the glass, and structured cut-outs are formed where coupling elements and mirrors will be placed. The paper gives transparency, thermal stability, and a low coefficient of thermal expansion as reasons for selecting glass in this design.
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The cut-outs and optical features are functional, not merely mechanical details. They help create the path between the waveguides in the board and the photonic component that will be attached later.
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The patterned glass core is embedded within a stack that includes prepreg and FR-4. The research design shows windows above and below the glass layer, giving assembly access and optical interfaces around the functional core. Integrating the glass while preserving those access points requires coordination between optical-layer fabrication and conventional printed-board fabrication.
This is the step that makes the design more than a standard PCB with an optical part added afterward: the optical routing medium is built into the board stack itself.
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4. Align and attach the photonic components
To connect a silicon photonic interposer to the glass-core waveguides, the described design uses a glass-layer cut-out, a coupling element, and a concave mirror. The assembly must place these parts accurately enough for light to pass between the chip and board waveguides.
The paper describes machine vision, telecentric camera optics, multi-axis positioning, component-handling equipment, optical measurement, and UV-curing adhesive as part of the alignment and attachment approach. In other words, assembly is a precision optoelectronic packaging task, not just component placement using ordinary PCB tolerances.
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At the board edge, optical interfaces can connect the waveguides to fibers or board-to-board connectors. IEC TR 62658:2013 treats optical circuit boards together with related connectors and optical modules on boards, reflecting that the connection and packaging are part of the system rather than an afterthought.
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Testing must account for the optical link as well as the electrical board. A visual PCB acceptance check alone does not establish optical alignment, insertion loss, or end-to-end link performance. The cited standards summaries cover broader board or packaging topics, but they do not supply a complete optical test plan for this particular EOCB design. The project therefore needs defined optical measurements and acceptance limits appropriate to its link architecture.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.Why does manufacturing involve both PCB fabrication and packaging?
The board has to preserve two different kinds of interconnect. PCB fabrication creates the electrical structure and incorporates the optical core; optoelectronic packaging mounts components and establishes low-error optical interfaces between them. A finished board can be electrically sound yet fail to deliver the intended optical connection if a coupler is misaligned or a waveguide interface is not functioning.
IPC-0040-2003, Optoelectronic Assembly and Packaging Technology, covers technology choices, design considerations, material properties, component mounting, assembly, testing, applications, rework, and reliability. It is useful packaging context, but it is not itself evidence that one specific EOCB stack or optical test procedure is mandatory.
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What do the cited standards cover?
The standards and technical references below address different parts of the problem. None should be assumed, by itself, to define all optical performance requirements for a particular board.
| Reference | What it addresses | How to interpret it |
|---|---|---|
| IEC TR 62658:2013 | Roadmap for optical circuit boards and related packaging technologies, including optical circuit-board connectors and optical modules on boards. | A technical report and roadmap, not by itself a current product qualification specification. |
| IPC-A-600M | Visual interpretations of requirements in printed-board specifications. | Useful for printed-board visual acceptability; a visual check alone does not establish optical link performance. |
| IPC-6012F | Qualification and performance requirements for rigid printed boards, including multilayer boards and certain embedded-circuitry constructions. | Do not assume it alone covers optical coupling or link performance. |
| IPC-6931 | Listed by IPC’s standards-status resource as “Requirements and Acceptance of Optical Module Printed Boards.” | Verify its current publication status and revision before treating it as an issued requirement. |
| IPC-0040-2003 | Optoelectronic assembly and packaging technology, including materials, mounting, assembly, testing, rework, and reliability. | Packaging guidance and context; the consulted ANSI listing establishes subscription availability, not general retail availability. |
IPC standards and status listings can change. Confirm the applicable revision, publication stage, and project requirements before using a reference as a governing specification.
What has been demonstrated, and what remains uncertain?
The Fraunhofer IZM paper describes a developed glass-based EOCB technology and board-level assembly methods. It also characterizes the full demonstration with assembled silicon photonic ICs directly interconnected at board level as ongoing work. The paper mentions a goal of up to 40 Gbit/s per channel for that demonstration; this is a target in the described research, not a verified rating for a current commercial product.
The paper is indexed as roughly nine years old, but its exact publication date was not confirmed in the available record. Its manufacturing details are evidence for a documented research approach, not proof of current industry-wide practice. The cited material does not establish commercial adoption, production yield, cost, or a comparison of reliability and throughput across competing approaches.
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