A digital communication signal is a physical voltage, current, electromagnetic field, or optical waveform that represents discrete symbols. The data may be binary, but the waveform carrying it is always subject to analog effects: finite rise time, bandwidth limits, attenuation, reflections, crosstalk, noise, and jitter.
“Electrical signal type” is not one classification. A link can be serial and differential, baseband and PAM4, or parallel and single-ended at the same time. The useful questions are: how are bits arranged, what is the voltage referenced to, how are symbols encoded, and whether a carrier is used?
What an electrical signal is
An electrical signal is a time-varying voltage or current used to convey information. Its important properties include:
- Amplitude: the voltage or current level.
- Time: when symbols and transitions occur.
- Frequency: the rate of periodic variation.
- Phase: the timing position of a periodic waveform relative to a reference.
- Polarity: the positive/negative relationship between conductors or a reference.
- Common-mode voltage: the voltage shared by two conductors relative to ground.
- Differential voltage: the difference between two conductors, Vdiff = V+ − V−.
- Bandwidth: the range of frequencies the signal and channel must pass.
- Rise and fall time: how quickly the waveform changes between levels.
A receiver converts the physical waveform into symbols by applying thresholds, timing decisions, or constellation rules. A “digital” waveform therefore does not need to be a mathematically perfect square wave.
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The introductory progression from parallel wiring to serial transmission, square-wave harmonics, common-ground signaling, differential signaling, and frequency-shift keying is illustrated by All About Circuits.
Digital information versus the physical waveform
Analog signaling
An analog signal can take any value within a continuous range. A microphone output, temperature-sensor voltage, or sinusoidal radio carrier is analog. Noise and distortion usually change its measured value continuously, so errors accumulate gradually.
Digital signaling
A digital link assigns a finite set of permitted symbol states. In the simplest binary case, the receiver decides whether the received value represents 0 or 1. Input thresholds and noise margins allow a range of voltages to count as each state; the voltage is not required to be exactly 0 V or exactly a specified high level.
| Property | Analog signaling | Digital signaling |
|---|---|---|
| Intended values | Continuous range | Discrete symbols |
| Receiver decision | Measures waveform value | Compares with thresholds or symbol regions |
| Effect of moderate noise | Distortion remains in the measured value | Regeneration can restore the intended symbol |
| Typical failure | Gradual degradation | Sudden errors when a threshold or timing boundary is crossed |
| Key design concerns | Linearity, noise and distortion | Voltage margin, timing margin, jitter, eye opening and bit-error rate |
Digital signaling is not noise-proof. Excessive attenuation, differential noise, reflections, common-mode violations, or timing error can still make the receiver choose the wrong symbol.
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Keep the layers separate
Communication systems are easier to understand when their layers are not conflated:
- Data layer: bits, bytes, packets and frames.
- Encoding layer: line coding, scrambling and symbol mapping.
- Physical layer: waveform, voltage or current, connector, cable, timing, termination and receiver limits.
- Protocol layer: addressing, arbitration, framing, error detection and retransmission.
RS-485, for example, specifies driver and receiver electrical characteristics rather than a complete message protocol. Modbus RTU is one protocol commonly carried over RS-485. See the Texas Instruments RS-485 overview.
The main classifications of electrical signals
These categories describe different dimensions of a link, so they are not mutually exclusive.
Parallel versus serial
Parallel signaling sends several bits simultaneously on separate conductors. An eight-bit bus might use eight data wires plus a clock or strobe. It offers a direct relationship between wires and bits and can be efficient over short board-level distances.
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- Advantages: several bits per transfer, straightforward local logic, and no serializer required.
- Limitations: more pins and cable conductors, skew between wires, crosstalk, simultaneous-switching noise, larger connectors and difficult timing over distance.
An example described by All About Circuits uses five wires, each representing one bit, with all bits arriving together; that is parallel communication.
Serial signaling sends symbols one after another over one conductor, one pair, or one channel. It reduces pin count and cable size and is often preferable on boards, backplanes and cables. Serialization, deserialization, clocking or clock recovery, and signal-integrity design add complexity. “Serial” does not mean slow; modern high-speed interconnects are serial to achieve high throughput with few conductors.
- Synchronous: a shared or recovered clock determines sampling.
- Asynchronous: an agreed baud rate and start/stop framing establish timing.
- Half-duplex: both directions share a channel but do not transmit simultaneously.
- Full-duplex: both directions operate simultaneously, usually on separate paths.
Single-ended (common-ground) versus differential
For a single-ended signal, the receiver measures one conductor against a reference, commonly circuit ground:
Vsignal = Vwire − Vground.
GPIO, many TTL- and CMOS-style logic connections, and RS-232-style links are ground-referenced examples. The circuit is simple and inexpensive for short connections with a controlled reference. A ground-potential difference or coupled interference directly changes the measured signal, while cable capacitance and inductance slow fast edges.
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Differential signaling uses two conductors and makes the receiver respond mainly to:
Vdiff = V+ − V−.
Interference coupled similarly into both wires is common-mode noise and can be rejected. Differential links generally tolerate longer, noisier routes and work well with twisted pair and controlled impedance. They still have limits: differential noise, pair imbalance, excessive common-mode voltage, incorrect polarity, poor return paths, and missing termination can all cause failures.
Texas Instruments discusses common-mode rejection, balanced wiring and a typical 120 Ω twisted-pair example for RS-485 in its RS-485 design guide. The cited specification context also describes receivers detecting a differential input as low as 200 mV; that value must not be generalized to every transceiver or standard.
Baseband versus passband
Baseband sends the encoded digital waveform directly through the medium rather than translating it to a carrier. GPIO, UART, SPI, I²C, RS-232, RS-485 and CAN are common wired examples. Baseband does not mean low frequency: fast edges contain substantial high-frequency components.
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Passband modulates a carrier. Digital information changes the carrier’s amplitude, frequency, phase, or a combination of them. ASK, FSK, PSK and QAM are passband methods. The resulting carrier remains an analog waveform even though it carries digital symbols. All About Circuits uses FSK as an example in which different sine-wave frequencies represent binary states.
Two-level and multilevel signaling
Binary two-level signaling is often called PAM-2. Multilevel pulse-amplitude modulation (PAM) uses more voltage levels. With M equally likely levels, one symbol carries log2(M) bits:
- PAM-2: two levels, one bit per symbol.
- PAM-4: four levels, two bits per symbol.
- PAM-8: eight levels, three bits per symbol.
PAM4 doubles the bits per symbol compared with binary signaling without doubling symbol rate, helping when channel bandwidth or loss limits transitions. The trade-off is smaller spacing between adjacent levels, tighter noise and linearity requirements, and more demanding equalization and measurement. Keysight describes these trade-offs in its PAM4 application note.
Common line codes
NRZ
Non-return-to-zero (NRZ) does not require the waveform to return to a neutral level between symbols. NRZ-L maps symbols to levels; NRZI maps information to a transition or lack of transition. Polar NRZ uses positive and negative levels, while unipolar NRZ uses zero and a positive level.
- Benefits: efficient bandwidth use and relatively simple implementation.
- Costs: long runs without transitions complicate clock recovery and can produce baseline wander or DC-balance problems.
NRZ describes a timing property, not one universal voltage convention.
RZ
Return-to-zero coding drives the waveform back toward a reference during each symbol period. The extra transition can provide timing information, but it increases bandwidth and switching activity.
Manchester and differential Manchester
Manchester coding forces a transition within every bit period, embedding clock information and avoiding long transitionless runs under normal operation. It requires more transitions and approximately more bandwidth than basic NRZ at the same bit rate. Differential Manchester encodes information in transitions while reducing dependence on absolute polarity.
Line coding maps bits to transitions; it is not the same as the electrical interface. A differential Manchester waveform could still be carried by a particular single-ended or differential physical circuit.
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Scrambling and block coding
Scrambling and block codes shape transition density, DC balance, or error-detection properties. Families such as 8b/10b and 64b/66b are examples; the exact code and rules depend on the relevant interface generation and standard.
Digital modulation methods
- ASK: changes carrier amplitude.
- FSK: switches among carrier frequencies.
- PSK: changes carrier phase.
- QAM: combines amplitude and phase states.
- PAM: changes pulse amplitude, often directly in a baseband electrical link.
Modulation can fit information into a band-limited or wireless channel, support frequency-division multiplexing, or make radiation and filtering practical. It does not turn the physical waveform into a digital object; the receiver still estimates an analog waveform and makes symbol decisions.
Representative interfaces
| Interface or family | Typical physical approach | What it does not tell you by itself |
|---|---|---|
| GPIO, TTL or CMOS logic | Usually short, single-ended, threshold-based baseband | Exact voltage levels; these depend on logic family, supply and datasheet thresholds |
| UART | Asynchronous serial framing; electrical layer may be logic-level or transceiver-based | Whether the pins are RS-232, RS-485 or 3.3 V logic |
| RS-232 | Ground-referenced, point-to-point serial interface with its own voltage conventions | Compatibility with a microcontroller UART without a level translator |
| RS-422 | Differential serial signaling, commonly point-to-point or one driver to several receivers | A complete application protocol or universal distance/rate |
| RS-485 | Balanced differential, often multipoint, with topology, biasing and termination requirements | Message format or arbitration protocol |
| CAN | Differential CANH/CANL bus with dominant and recessive states | Higher-level CAN profiles and application objects |
| USB | Serial links whose electrical details vary by USB generation and mode | One universal voltage, coding or lane structure |
| Ethernet | Generation-specific copper or optical PHYs, often differential and encoded or modulated | One universal signaling format across all speeds and media |
| PCIe | High-speed serial lanes with training, clock recovery and generation-specific electrical rules | One universal modulation, equalization or lane rate |
GPIO, TTL and CMOS
A GPIO input recognizes low and high regions relative to a shared ground. Hysteresis can improve noise tolerance, while fan-out and capacitive loading affect edge speed. A long cable connected directly to a GPIO adds transmission-line, EMI and protection problems; a suitable transceiver, series resistor, shielding or differential interface may be needed. Never assign one “TTL voltage” or “CMOS voltage” without naming the logic family, supply and guaranteed thresholds.
RS-232
RS-232 is a ground-referenced serial interface intended primarily for point-to-point links. Its electrical voltage conventions are not ordinary 3.3 V or 5 V logic, so a connector should not be wired directly to a microcontroller UART without an appropriate level translator. Ground differences and interference generally make it less suitable than a balanced bus for long noisy routes.
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Both use differential physical signaling. RS-485 is widely used for industrial and building-control networks and supports multipoint arrangements. Design depends on the transceiver’s common-mode range, node count, bus topology, fail-safe biasing, cable, termination and protection. RS-485 itself does not define addressing, packets or retries; a separate protocol supplies those functions.
CAN
CAN uses a differential pair and two bus states: dominant and recessive. A dominant state overrides a recessive state, enabling nondestructive arbitration. The electrical state, logical bit value, arbitration behavior and error handling are related but distinct concepts. TI’s reference design shows CANH/CANL and a 120 Ω twisted-pair and termination context in the cited design: CAN reference design. Its termination recommendations apply to that bus topology and should not be copied to every differential interface.
USB, Ethernet and PCIe
Modern high-speed links commonly combine differential pairs, controlled impedance, AC coupling in some sections, equalization, clock recovery, scrambling, training sequences and compliance testing. The details vary by generation and standard. Keysight’s bus-measurement guide lists USB, PCIe, CAN, LIN, FlexRay, I²C, SPI, JTAG and RS-232/RS-485 as interfaces requiring different probing and analysis methods: Keysight serial-bus measurement guide.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.Why a digital waveform changes on a real link
A square wave is the sum of a fundamental and many harmonics. A cable, connector and receiver do not pass all those frequency components equally. Frequency-dependent attenuation and phase shift round edges and can produce overshoot, undershoot, ringing and intersymbol interference.
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- Finite transmitter rise and fall time
- Cable dielectric loss and skin effect
- Impedance discontinuities and connector transitions
- Reflections from mismatched source, load or stubs
- Crosstalk and electromagnetic interference
- Ground bounce and return-current discontinuities
- Receiver bandwidth and input loading
Probe the receiver pin, not only the transmitter output. The waveform that matters is the one from which the receiver makes its decision.
Bandwidth, bit rate and baud
Bit rate is bits per second. Symbol rate, measured in baud, is symbols per second. Bandwidth is the frequency range occupied or required by the signal and channel. For one-bit-per-symbol binary signaling, bit rate equals symbol rate. For ideal M-level signaling:
bit rate = symbol rate × log2(M),
before framing, scrambling, coding and forward-error-correction overhead. Thus baud and bits per second are not universally interchangeable, as the All About Circuits discussion notes.
Eye diagrams
An eye diagram overlays many symbol periods. Eye height indicates voltage margin; eye width indicates timing margin. Closure reveals noise, jitter, duty-cycle distortion and intersymbol interference. A binary link has one principal eye; PAM4 has three vertically stacked eyes, each smaller and more sensitive to level and timing errors. Keysight’s compliance materials cover eye, level, jitter, noise and return-loss measurements for NRZ and PAM4:
Termination and impedance control
Even a modest-rate bus can behave as a transmission line when its edge is fast relative to the interconnect delay. Characteristic impedance, source or parallel termination, AC termination, differential termination, stub length, connector discontinuities and the return-current path all matter.
TI identifies 120 Ω as a common cable impedance for RS-485 and recommends preserving the pair’s electrical characteristics through layout and connector assignment in its design guide. A separate TI CAN reference design shows termination at both bus ends in its stated topology. Values and placement are standard- and topology-specific; termination does not repair wrong polarity, bad grounding, common-mode violations, excessive attenuation or protocol errors.
How to identify and troubleshoot an unknown signal
- Confirm the expected interface, polarity and connector pinout from the applicable datasheet or standard.
- Check that transmitter and receiver voltage and common-mode ranges overlap.
- Record cable type, length, pair assignment, shielding, topology and any stubs.
- Verify termination value and placement for that specific bus.
- Probe at the receiver with an appropriately rated, low-loading probe.
- Inspect amplitude, edge rate, ringing, overshoot, undershoot and baseline movement.
- Measure differential voltage and common-mode voltage separately on a differential link.
- Check baud or symbol rate, clock recovery, framing and sampling timing.
- Compare measurements with the relevant interface specification and transceiver datasheet.
- Use protocol decoding only after establishing that the physical waveform is valid.
A logic analyzer is excellent for decoded states and protocol timing, but an oscilloscope is required to see analog amplitude, ringing, eye closure, jitter and overshoot. A differential probe must have sufficient common-mode range and bandwidth; its own loading and skew can affect the result.
Choosing a signaling approach
Single-ended or differential?
- Choose single-ended for short connections, controlled grounds, modest edge rates, low EMI exposure and minimum cost.
- Choose differential for longer cables, noisy environments, uncertain ground potential, lower emissions or controlled-impedance routing.
NRZ or PAM4?
- Choose NRZ/PAM2 when voltage margin, simpler receivers and a clean, manageable channel matter most.
- Choose PAM4 when channel bandwidth or loss limits symbol rate and the design can support equalization, more complex decisions and compliance testing.
Baseband or passband?
- Choose baseband for direct wired interconnects and channels that pass the required low-frequency content.
- Choose passband modulation for wireless links, band-limited channels, frequency-division multiplexing or systems that require a carrier.
Parallel or serial?
- Choose parallel when distance is short, pins are plentiful, simultaneous transfer is valuable and skew can be controlled.
- Choose serial when pin count, cable size or routing dominates and serialization and clock recovery are acceptable.
Common mistakes
- “Digital signals are square waves.” A square wave is an ideal model; the channel waveform is analog and may be rounded, distorted or multilevel.
- “Baud equals bits per second.” Only one-bit-per-symbol signaling makes that equality, before overhead.
- “Differential means noise cannot matter.” Common-mode rejection does not remove differential noise, imbalance or common-mode violations.
- “RS-485 defines the protocol.” It primarily defines electrical behavior; a separate protocol defines messages.
- “A faster clock always means higher-frequency interference.” Edge rate, transition density, encoding and spectral content matter as much as clock frequency.
- “Termination fixes every bus problem.” It mainly controls reflections and cannot correct polarity, grounding, attenuation or protocol faults.
Glossary
| Term | Meaning |
|---|---|
| Bit | A binary information value, normally 0 or 1. |
| Symbol | One selected waveform state from the signaling alphabet; it can represent one or more bits. |
| Baud | Symbols per second. |
| Bit rate | Bits per second. |
| Baseband | Direct transmission of an encoded waveform without a carrier shift. |
| Passband | Transmission after modulation onto a carrier. |
| Differential | Receiver decision based primarily on the voltage difference between two conductors. |
| Common-mode | A voltage component shared by both conductors relative to a reference. |
| NRZ | Non-return-to-zero line coding. |
| PAM4 | Four-level pulse-amplitude modulation carrying two bits per symbol. |
| Eye diagram | An overlay of symbol intervals used to assess voltage and timing margins. |
| Jitter | Variation in transition or sampling time. |
| Termination | A deliberate load or source network used to control reflections. |
| BER | Bit-error rate, the fraction of received bits decided incorrectly. |
| Equalization | Transmitter or receiver processing that compensates for channel loss and dispersion. |
The Bottom Line
Identify a signal on more than one axis: serial or parallel, single-ended or differential, baseband or passband, and two-level or multilevel. Then evaluate the waveform at the receiver, where bandwidth, impedance, noise, jitter and timing determine whether the intended symbols can still be recovered.
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