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Two threads can update different variables and still contend because processors coordinate cache coherence in cache-line-sized chunks, not one source-language variable at a time. If the variables sit in the same cache line and different cores write them, the line can repeatedly move between cores—a performance problem known as false sharing.

How can separate variables interfere?

Each core may keep a cached copy of data it uses. To write, a core needs an appropriate ownership state for the cache line containing that data. If another core also holds the line, the processor’s coherence protocol coordinates invalidation or transfer. When cores repeatedly write different words in the same line, each write can disturb the other core’s copy. The resulting repeated movement is often called cache-line bouncing. Paul E. McKenney’s discussion of MESI describes the modified, exclusive, shared, and invalid states involved in coordinating line ownership (*Is Parallel Programming Hard, And, If So, What Can You Do About It?*, edition v2024.12.27a).

For example, imagine worker A incrementing one counter while worker B increments another. If both counters occupy the same coherence line and the workers run on separate cores, writes to either counter can require ownership of that whole line. The counters remain distinct; their physical placement makes them contend for the same coherence unit. This is a conceptual example, not a benchmark result for a particular processor.

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When is it false sharing?

The key conditions are that multiple CPUs access data in a shared cache line and at least one access is a write. Repeated write/write activity can cause ownership transfers; a write on one field can also interfere with another CPU’s reads of a nearby field. A field need not itself be frequently written to suffer: a frequently read neighboring field may be affected when another CPU writes elsewhere on the line.

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  • Read-only sharing alone is not the false-sharing pattern described here; the problematic coherence activity involves a write.
  • Logical independence does not prevent hardware contention. Threads can access distinct variables without a language-level data race while still contending for one coherence line.
  • Common candidates include adjacent small global variables, unrelated structure members, and a frequently updated reference count next to mostly read-only data. The Linux kernel documentation also notes that locks and protected data placed together can create traffic in contended situations.

False sharing is a performance issue; by itself, it does not mean the program has a data race. Correctness still depends on the language-level synchronization and access rules for the actual program.

How do you confirm it on Linux?

Profile the real workload before changing layout. The Linux kernel documentation describes perf-c2c for identifying cache lines with cache-to-cache activity and reporting access functions, source locations, and offsets. It also describes pahole for examining structure layout at cache-line granularity; addr2line can help decode instruction locations when needed. See the kernel’s False Sharing documentation.

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  1. Start with a representative workload. Identify whether the suspected code is a meaningful hotspot before focusing on layout.
  2. Record cache-to-cache activity. The kernel documentation gives perf c2c record -ag sleep 3 as an example. Adapt the command to your application and environment rather than treating this sample interval as a required test.
  3. Inspect the report. The documented example is perf c2c report --call-graph none -k vmlinux. Use the report to locate lines and access sites with relevant activity.
  4. Connect addresses to layout and code. Inspect the implicated structure with pahole and, when useful, decode instruction locations with addr2line.
  5. Validate the suspected cause. Check that the reported line and access sites matter to the workload. After any change, compare performance on the same representative workload and verify correctness.

These commands are documented examples, not findings about your program. A cache-to-cache report is a lead to investigate, not a reason to pad every structure.

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Which fixes are worth trying?

Choose a change that targets the measured access pattern. The Linux kernel documentation cautions that false sharing does not always need mitigation and that improvements should be balanced against complexity and space consumption.

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Separate hot fields

Reorganize a structure or separate frequently written fields when profiling shows unrelated hot data sharing a line. Group fields commonly written together, and consider separating frequently read data from frequently written data if their access patterns conflict. Moving fields can create new sharing elsewhere, so recheck the resulting layout and profile.

Reduce writes

If the program’s semantics permit it, avoid unnecessary writes—for example, use a read or a conditional write where that is correct. Fewer writes can mean fewer ownership changes, but the change must preserve the program’s intended behavior.

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Aggregate locally

Per-CPU counters or local aggregation can reduce or defer writes to shared global state. This approach can add complexity and must preserve the consistency and visibility the application requires.

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Use alignment or padding selectively

Padding can place hot fields on different lines, but it increases memory footprint and may also increase cache and TLB use. Cache-line size is platform-dependent: Linux documentation describes common examples as usually 64 bytes or more, not as a universal size. Check the target machine rather than assuming one alignment or padding strategy is best.

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How should you choose among the options?

Compare the suspected line’s measured importance and write pattern with the cost of each change. A layout split may be simpler than introducing aggregation; local counters may suit frequent updates but require more design work to combine state. In every case, assess memory footprint, cache and TLB effects, complexity, measured performance, and correctness. The sources do not establish benchmark results or a universally optimal layout for a particular application.

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