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AI data centers need large amounts of both memory and storage because accelerators must repeatedly access a fast working set while the complete datasets, model files, checkpoints, logs, and retained inference data live at a much larger persistent scale. GPU high-bandwidth memory (HBM) keeps active computations close to the accelerator; CPU memory can add capacity on compatible systems; storage preserves data beyond those volatile tiers; and a network or data fabric moves information between them. Training expands the working set with gradients, optimizer state, activations, and batches. Inference adds per-request context, especially the key-value (KV) cache used by language models.
Memory and storage solve different problems
“Memory” in an AI server usually means volatile working space that the processor can access quickly. “Storage” means persistent capacity that survives a restart and can scale far beyond an individual accelerator. Confusing the two leads to bad infrastructure decisions: a large SSD cannot substitute for insufficient HBM during a kernel, while filling a GPU with rarely used historical data wastes expensive bandwidth.
HBM: the accelerator’s immediate workspace
High-bandwidth memory is physically associated with the accelerator package or board and is optimized for very high throughput. It holds the tensors that compute kernels are actively reading and writing: model weights, intermediate activations, gradients, optimizer state, and—in inference—request-specific state. HBM capacity is fixed by the accelerator configuration, so an operation that exceeds it can fail even when the server has ample disk space.
Google Cloud AI engineering leader Shir Meir Lador describes the practical consequence: “Your GPU’s High Bandwidth Memory (HBM), is the high-speed memory that holds everything that’s needed for computation, and running out of it is a hard stop.” The statement appears in the December 2, 2025 Google Cloud guide to HBM for fine-tuning.
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CPU or system memory: extra capacity when the platform supports it
Some platforms expose CPU-attached memory through a coherent address space, allowing software to place less latency-sensitive tensors or caches outside HBM. NVIDIA’s GH200 example combines 96 GB of high-bandwidth GPU memory with access to 480 GB of CPU-connected LPDDR memory, as described in its CPU-GPU memory-sharing article. Those figures describe that platform, not a universal ratio. CPU memory has different latency and bandwidth characteristics, so moving data there can prevent an out-of-memory condition without making it equivalent to HBM.
Persistent storage: the durable, scalable tier
Flash arrays, NVMe devices, hard drives, and hybrid systems retain training corpora, checkpoints, indexes, feature data, evaluation results, logs, and model versions. Storage capacity can grow independently of the number of GPUs, but the data still has to travel over PCIe, a network interface, a data-processing unit (DPU), or another fabric before an accelerator can use it. NVIDIA’s storage-planning overview describes a hierarchy containing GPU memory, a data fabric, and storage devices, with examples including hard drives, flash, hybrid arrays, PCIe, network cards, and DPUs: Tips on Scaling Storage for AI Training and Inferencing.
Why training consumes so much memory
Training is not a matter of loading one copy of a model and updating it. A training step typically needs several simultaneously live data structures, and their sizes change with numerical precision, optimizer choice, batch size, sequence length, and model architecture.
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- Weights: the parameters used to make predictions.
- Gradients: values calculated during backpropagation to update those parameters.
- Optimizer state: extra tensors maintained by algorithms such as AdamW.
- Activations: intermediate results retained until the backward pass; deeper networks and longer sequences create more of them.
- Input batches: tokenized text, images, audio, or other examples being processed in parallel.
Google Cloud’s December 2025 explanation identifies all five categories as HBM consumers during fine-tuning and notes that precision, optimizer, batch size, and model configuration determine the actual requirement. The model’s advertised parameter count therefore understates the memory needed for a training step.
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A weight-size example is only a starting point
A 7-billion-parameter model stored at 16-bit precision needs roughly 14 GB for weights alone, according to the same Google Cloud guide. That number excludes gradients, optimizer state, activations, temporary buffers, and framework overhead, so it is not a full fine-tuning budget.
Google Cloud gives a more concrete illustration for a 4-billion-parameter MedGemma model: full fine-tuning with bfloat16 and AdamW has a 32 GB static baseline before additional activation memory is counted. Changing the optimizer, precision, sequence length, checkpointing strategy, or batch size changes the result; the example is not a rule that every 4-billion-parameter model needs exactly 32 GB.
Why larger batches and full fine-tuning raise the bill
Increasing batch size processes more examples concurrently and usually increases activation and input-buffer memory. Full fine-tuning updates every weight, so it retains gradients and optimizer state for the entire model. Parameter-efficient methods can reduce the trainable state, while lower-precision formats reduce bytes per value, but both still require memory for activations and data movement. When one accelerator cannot hold the working set, systems may shard parameters, use activation checkpointing, offload selected tensors to CPU memory, or distribute the model across multiple accelerators. Each technique trades memory pressure for extra communication, recomputation, or coordination.
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Inference reuses a model’s weights across requests, but it does not have one fixed memory footprint. Every active request has its own input, generated output, and attention state. For transformer language models, the most important retained state is the KV cache.
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What the KV cache stores
As each token is processed, attention produces key and value vectors that later tokens can reuse. Keeping those vectors avoids recomputing the entire preceding context at every generation step. The cache grows with context length, model dimensions, number of layers, precision, and the number of simultaneous requests. A service handling many long conversations can therefore exhaust HBM even when the model weights fit comfortably.
The latency trade-off
Shortening or discarding cache saves memory but forces recomputation or limits context. Moving cache blocks to CPU memory or storage preserves more sessions but adds transfer latency and consumes fabric bandwidth. The right choice depends on the service’s latency target, context distribution, concurrency, and eviction policy rather than on model size alone.
How storage keeps accelerators supplied
Training datasets can be many orders of magnitude larger than accelerator memory. A training job repeatedly streams shards, performs preprocessing, writes checkpoints, and may reread examples for validation or retraining. Inference systems fetch model versions, retrieval indexes, user data, and safety or monitoring artifacts. Long-running services also need durable logs and checkpoints so a failure does not erase progress.
Storage must be fast enough, not merely large enough
If storage or the path to it cannot deliver data at the rate the workload consumes it, accelerators wait idle. Parallel reads, caching, prefetching, compression, replication, and locality can reduce stalls, but they do not eliminate the need to size the storage fabric for aggregate throughput and failure recovery. The storage tier may scale independently of GPU count, yet every additional accelerator increases the potential demand on shared links and metadata services.
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The data-fabric layer
A data fabric connects persistent devices to compute and memory. It can include PCIe links inside a server, network cards, switches, DPUs, and software that stages or caches data. NVIDIA’s hierarchy is an architectural example rather than a requirement that every data center use the same components. The important principle is separation of roles: storage supplies durable capacity, the fabric transports bytes, and HBM supplies the bandwidth needed by active kernels.
Training, inference, and storage at a glance
| Workload or tier | What must be retained | Access pattern | Main pressure |
|---|---|---|---|
| Training | Weights, gradients, optimizer state, activations, and input batches | Repeated reads and writes during forward and backward passes | HBM capacity and bandwidth; communication when the model or batch is sharded |
| Inference | Shared weights plus per-request inputs, outputs, and KV cache | Frequent weight reads and iterative token-generation updates | KV-cache growth, concurrency, and latency-sensitive movement |
| Persistent storage | Datasets, checkpoints, model versions, indexes, logs, and retained context | Large sequential and random reads and writes over time | Capacity, aggregate throughput, durability, and fabric contention |
| CPU/system memory | Staged tensors, cache spillover, preprocessing data, or offloaded state | Slower than HBM but potentially much larger | Platform support, bandwidth, and transfer latency |
Why bandwidth and proximity matter
Memory capacity answers whether a working set fits; bandwidth and distance determine how quickly it can be consumed. A Microsoft Research paper uses 8 TB/s as a B200 memory-bandwidth example. That is a platform-specific figure quoted in the 2025 paper Storage Class Memory is Dead, All Hail Managed-Retention Memory: Rethinking Memory for the AI Era, not a universal specification for every accelerator.
Vendor descriptions also show how systems pool resources. Microsoft says one AI data-center rack described in its September 18, 2025 account contains 72 Blackwell GPUs and 14 terabytes of pooled memory: Inside the world’s most powerful AI datacenter. That is one vendor’s rack configuration, not a typical or recommended design. It illustrates why topology matters: a cluster may expose more aggregate memory, but software still has to place tensors and move data across links with different costs.
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How to size memory and storage for a real workload
- Define the workload. Record whether the system will pretrain, fine-tune, serve inference, or do all three. Training and inference have different live-state requirements.
- Calculate the model representation. Multiply parameter count by bytes per parameter for the chosen precision, then add the copies required by the framework, sharding strategy, and temporary buffers.
- Add training state. Include gradients, optimizer state, activations, and the largest planned batch and sequence length. For inference, include the maximum concurrent requests and context length instead.
- Choose an overflow strategy. Decide whether to reduce batch size, use checkpointing, shard across accelerators, offload to CPU memory, or place cold state in a cache or storage tier. Measure the resulting communication and latency impact.
- Estimate persistent data. Count raw datasets, transformed copies, checkpoints, replicas, model versions, indexes, logs, and retention periods. Include headroom for retraining and failed jobs rather than sizing only for today’s corpus.
- Check the fabric. Verify that PCIe, network links, switches, storage controllers, and metadata services can sustain the aggregate read and write rate when all accelerators are active.
- Plan recovery and placement. Keep durable checkpoints and replicas outside the volatile accelerator tier, and place frequently reused data close enough to avoid starving compute.
Common misconceptions and failure modes
“The model is 14 GB, so a 16 GB GPU is enough”
The 14 GB figure for a 7-billion-parameter 16-bit model covers weights only. Training adds gradients, optimizer state, activations, and batches; inference adds KV cache and request concurrency. A weight-size calculation is a lower bound, not a deployment specification.
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“More SSD capacity fixes an HBM shortage”
Storage can hold data that does not fit in HBM, but it cannot provide HBM’s access characteristics. If kernels require a tensor every iteration, repeatedly fetching it from a distant tier may make the accelerator wait or miss latency targets.
“CPU memory is interchangeable with GPU memory”
Coherent addressing and cache offload can extend capacity on supported platforms, such as the GH200 configuration described above, but CPU-connected memory has different bandwidth and latency. Treat it as an additional tier with a measured transfer cost.
“A vendor rack number is an industry standard”
Figures such as 72 GPUs and 14 TB of pooled memory describe a particular system. Other designs vary with accelerator generation, networking, power, cooling, fault domains, and software topology. Vendor performance claims should be read as architecture examples unless an independent benchmark establishes broader results.
Where newer architectures are heading
Long-context and agentic applications are encouraging systems to treat context as a managed data tier rather than keeping every byte in HBM. Vendor articles describe software that distributes or offloads KV cache and uses CPU or storage-backed context tiers. NVIDIA discusses this direction in As AI Increases Demands on Memory, Storage Steps Up (August 4, 2026), while Meta describes its own large-scale approach in Meta’s AI Storage Blueprint at Scale (July 1, 2026). These are vendor architecture accounts, not evidence that one design is standard or universally available.
Software can also change how memory is used. NVIDIA’s Dynamo announcement describes an open-source library intended to accelerate and scale reasoning-model inference: NVIDIA Dynamo (March 18, 2025). Such systems may schedule requests, distribute cache, or select among memory tiers, but they do not remove the underlying capacity and bandwidth constraints.
The practical takeaway
AI data centers need so much memory because computation keeps a large, rapidly changing working set close to accelerators. They need so much storage because datasets, checkpoints, model versions, indexes, logs, and retained context must persist and scale beyond that working set. HBM, system memory, storage, and the data fabric are complementary layers. Efficient infrastructure supplies each layer at the speed and capacity its workload requires instead of treating “memory” and “storage” as interchangeable.
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