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A quantum computer is scalable when its useful, error-corrected capacity can grow without the control, cooling, wiring, decoding, software, or energy needed for each additional qubit becoming impractical. A large physical-qubit count is only a starting point. A credible scale claim identifies how many qubits are simultaneously usable, how long encoded information survives, which logical operations work, how deeply circuits can run, and whether the entire system can expand for a real workload.
What “scalable” means in quantum computing
Scalability is the ability to increase useful computational capacity while preserving reliability and keeping the required resources manageable. In a quantum computer, that capacity is not measured by qubit count alone. It depends on whether the machine can execute larger and deeper computations with error correction, control, readout, decoding, cooling, interconnects, software and classical processing all working together.
The U.S. Department of Energy’s 2024 roadmap treats large-scale fault-tolerant computing as a full-stack engineering problem. Materials and devices, packaging, cryogenics, control electronics, error-correction codes, decoders, software and algorithms all have to develop together. A processor that adds qubits but cannot supply the wiring, calibration, feedback or decoding those qubits need has not demonstrated practical scale.
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- Fault-tolerant: logical errors are suppressed sufficiently for meaningful algorithms to succeed.
- Addressable: the system can selectively control and measure the needed qubits.
- Universal: it supports the operation set required for general quantum computation.
- Adaptive: measurements can influence later operations through timely classical feedback.
- Modular: additional processing units can be connected without redesigning the entire machine.
- Efficient: the resources required to increase capacity remain practical for the intended applications.
Those six terms are a useful evaluation framework, not an industry-wide standards document. Microsoft researchers Matthias Troyer, Chetan Nayak and John Martinis proposed a more specific definition in September 2026: “To make the progress on logical qubits measurable and comparable we introduce the definition of scalable logical qubits: logical qubits preserved for long computations by repeated quantum error correction, capable of fault-tolerant universal operations with low-latency real-time decoding and feedback, and replicable to the hundreds or thousands, as required by applications.” This is a vendor proposal, not a consensus rule, but it captures the evidence a serious logical-qubit claim should provide.
Are more qubits always better?
No. A physical qubit is a controllable hardware element. A logical qubit is encoded information protected by an error-correction procedure and may require many physical qubits, depending on the code, target error rate and operating conditions. Physical and logical qubits therefore measure different things.
A device can advertise more physical qubits yet perform less useful computation than a smaller device with lower error rates, better connectivity or functioning logical operations. The relevant questions are:
- How many qubits are operational and simultaneously available?
- Are they physical qubits, encoded logical qubits, modules or another unit?
- What code, code distance and protection procedure are being used?
- Does the logical error rate decrease as protection resources increase?
- Can the logical qubits survive repeated correction cycles and support the gates required by the algorithm?
A vendor’s use of the phrase “logical qubit” should be accompanied by the encoding method, operating conditions, measured error behavior and supported operations. A protected state observed briefly is not equivalent to a logical qubit that can participate in a long computation.
What evidence shows that error correction is useful?
Error correction must support computation, not merely produce a favorable snapshot. Look for repeated correction cycles, logical-error suppression, addressable logical qubits, and decoders and feedback that operate quickly enough for the processor’s cycle time.
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Repeated protection
Ask whether correction was performed repeatedly for the duration of a computation. A single preparation-and-measurement experiment can show that a code works under one condition, but it does not establish that encoded information remains usable through a long circuit.
Error suppression with additional resources
Strong evidence shows how the logical error changes when code distance, redundancy or other protection resources increase. If adding protection does not reduce the relevant error, the system has not yet demonstrated the regime needed for fault-tolerant scaling.
Fault-tolerant operations
Check which operations are demonstrated: preparation, measurement, one- and two-qubit gates, universal gate sets, and operations between logical qubits. A code that protects storage but cannot support the algorithm’s gates is not a complete computational solution.
Real-time decoding and feed-forward
Error syndromes have to be processed while the computation is running. A credible claim identifies the decoder, its latency, how corrections affect subsequent operations, and whether classical feedback keeps pace with the quantum hardware. Offline analysis of stored data does not establish real-time fault tolerance.
How to evaluate a quantum-computing scale claim
1. Identify the unit being counted
- Read the headline number precisely. Determine whether it counts physical qubits, logical qubits, modules, gates, circuit layers or operations.
- Check simultaneous availability. A system may contain a stated number of qubits while calibration, routing or measurement constraints make only a subset usable together.
- Classify the evidence. Label the number as a design target, calibrated specification or measured result.
- Record the date and system. Hardware figures and definitions change; a number without a date cannot be compared safely.
Never combine a physical-qubit total from one company with a logical-qubit result from another as though they were the same scale unit.
2. Inspect the error model and correction behavior
- What physical gate, measurement and reset errors were measured?
- What noise model and operating conditions were used?
- Does logical error fall as protection resources increase?
- How many correction cycles were completed?
- Which logical gates, measurements and feed-forward paths were demonstrated?
- Were decoder and feedback timings measured during the computation?
Also distinguish a framework from a standard. IBM’s six criteria and Microsoft’s scalable-logical-qubit proposal are useful ways to organize questions, but neither should be presented as a universally adopted certification.
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3. Record circuit width and depth together
Width is the number of qubits participating in a circuit. Depth is the number of sequential layers. A wide, shallow circuit stresses a system differently from a narrow, deep circuit. Report both, along with the number and type of gates.
- State whether the gate count means total gates, two-qubit gates, logical gates or another operation.
- Include routing and SWAP overhead caused by limited connectivity.
- Identify the circuit family and whether it is synthetic or application-motivated.
- State the accuracy or success threshold used to decide whether the circuit completed.
- Include compilation, error mitigation, postselection and classical assistance.
IBM Quantum reported that its Heron R2 system ran circuits containing up to 5,000 two-qubit gate operations on 156 qubits in a 2024 performance account. The same account reported more than 150,000 circuit-layer operations per second (CLOPS). These are IBM-reported metrics for that stated demonstration; they are not a cross-vendor superiority ranking or proof of application advantage.
4. Examine benchmark design and reproducibility
A benchmark is meaningful only in relation to the workload and success criterion it uses. Ask:
- What practical or representative task does the workload model?
- Who selected the circuits, and are they synthetic or application-derived?
- What output-quality threshold counts as success?
- How many runs and shots were made?
- Are uncertainty, failures and discarded runs reported?
- Were compilation, mitigation, postselection or external classical computation included?
- Can an independent team reproduce the result?
A 2025 review in Nature Reviews Physics notes that benchmark quality varies and that weak benchmarks can misdirect research. It distinguishes benchmarks according to which parts of a system they assess, so a score for control speed should not be treated as a score for algorithmic usefulness.
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5. Understand what common metrics measure
| Metric or measure | Question it answers | Important qualification |
|---|---|---|
| Physical-qubit count | How many hardware qubits are present? | Does not establish logical protection, simultaneous usability or useful circuit depth. |
| Logical-qubit count | How many encoded qubits are being protected? | Requires the code, protection procedure, logical error rate and supported operations. |
| Circuit width | How many qubits participate? | Must be paired with depth, connectivity and simultaneous availability. |
| Circuit depth | How many sequential layers can run? | Depends on gate errors, coherence, routing and correction behavior. |
| CLOPS | How quickly can parameterized circuits be executed? | It is a throughput measure, not a direct measure of accuracy or application value. |
| Quantum Volume | How deep a defined circuit can a given number of qubits run with meaningful results? | It is protocol-dependent; the circuit family, compilation and success criterion matter. |
| Logical error rate | How often does an encoded operation or memory fail? | Require repeated-cycle data and the protection resources used to obtain it. |
| End-to-end application result | Does the machine solve a specified task at a useful quality? | Must include validation and a strong classical comparison. |
IQM’s documentation describes Quantum Volume in terms of the deepest circuit a specified number of qubits can execute with meaningful results, and CLOPS as a speed metric for parameterized circuits. Neither metric replaces a workload-specific evaluation.
6. Demand a fair classical comparison
An advantage claim needs a defined problem, an output-quality target, a valid quantum answer and the best practical classical method for the same task. Compare the measures that matter for the application: runtime, total cost, energy, accuracy, memory, throughput or another stated objective.
Include the complete workflow. Classical preprocessing and postprocessing, data movement, error mitigation, compilation, queue time and the quantum service’s runtime can materially change the result. AWS’s end-to-end resource-estimation guidance emphasizes calculating logical-qubit and operation requirements, then comparing those requirements with classical solutions.
IBM’s November 2025 discussion said that the candidates it considered had not met its own validation and measurable-separation tests at that time. That was a dated, IBM-specific assessment; it should not be generalized to every later claim or treated as a permanent verdict.
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Adding qubits increases demands outside the quantum chip. A scalable design must address the following dependencies:
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- Control wiring and electronics: signals must reach more qubits without excessive heat, interference or calibration burden.
- Readout: measurement channels and electronics must distinguish states at the required accuracy and speed.
- Cryogenics and power: cooling capacity, thermal load and control power must remain practical as hardware grows.
- Packaging: devices need physical integration that supports dense connections and reliable operation.
- Interconnects and modularity: separate processing modules must communicate with acceptable error and latency.
- Calibration and drift management: the system must remain characterized as the number of components increases.
- Classical decoding: processors must handle syndrome data and feed-forward at the necessary rate.
- Software: compilers, schedulers and resource estimators must expose the real costs of connectivity, routing and correction.
IBM’s framework calls modularity and efficiency explicit scaling criteria. The DOE roadmap similarly places system engineering, control, software and algorithms alongside materials, devices and error correction. A claim that reports only the chip’s qubit count omits much of the scaling problem.
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| Comparison axis | Evidence to collect |
|---|---|
| Scale unit | Physical and logical qubits, modules, gates and the number usable simultaneously. |
| Reliability | Physical gate and readout errors, logical error rates, suppression with code resources, drift and calibration stability. |
| Computational capability | Supported logical operations, connectivity, routing overhead, circuit width and depth. |
| Speed | Gate and circuit execution time, control latency, decoding and feedback latency, and workload throughput. |
| Error-correction maturity | Repeated cycles, code family and distance, logical operations, decoder operation and feed-forward evidence. |
| System growth | Control electronics, wiring, packaging, cryogenics, interconnects, modularity, footprint and power. |
| Application relevance | Defined workload, required precision, end-to-end logical resources, classical baseline and result quality. |
| Evidence quality | Date, protocol, success threshold, repetitions, uncertainty, independent reproduction and result-versus-roadmap status. |
Use the same definitions and workload when comparing systems. A higher number on one axis does not compensate automatically for a weakness on another: faster execution with poor accuracy may be less useful than slower, more reliable computation.
How to treat roadmaps and future milestones
Roadmaps describe intent, not delivered performance. Put the date, source and status beside every future number.
IBM’s April 2025 roadmap listed a planned modular, error-corrected Starling system with 200 qubits and 100 million gates. IBM’s hardware page described delivery as planned for 2029. Those figures are company targets, not measured results from a delivered system. They are useful for tracking stated objectives, but they cannot be placed in a results table beside demonstrated hardware without clearly separating the categories.
Recheck future milestones before publishing or making a buying decision. Schedules, architectures and definitions can change, and a roadmap may be revised without invalidating earlier measured results.
A practical checklist for reading a headline claim
- What exactly is being counted? Physical qubits, logical qubits, gates, layers, modules or operations?
- When and on which system? Record the hardware version, date and operating conditions.
- How many are usable together? Separate installed capacity from simultaneously calibrated capacity.
- What errors were measured? Include gate, readout and logical errors, not just a qubit total.
- Was correction repeated? Look for code details, cycles, decoder timing and logical-error suppression.
- What computation ran? Record width, depth, gate types, routing, compilation and success threshold.
- What benchmark protocol was used? Check circuits, shots, repetitions, uncertainty and reproducibility.
- What classical work was included? Count preprocessing, postprocessing, mitigation and data movement.
- Is the number a result or a roadmap? Do not report a target as a delivered capability.
- Does it matter for the intended application? Compare the complete task, output quality and resource cost with a strong classical approach.
The bottom line on quantum scale
Quantum scale is the growth of reliable, useful logical computation, not the accumulation of physical qubits. The strongest claims connect encoded-qubit behavior, repeated error correction, fault-tolerant operations, circuit width and depth, execution speed, system engineering and end-to-end application results. Treat every number as a dated measurement with a defined protocol, and keep vendor frameworks and roadmaps clearly labeled as proposals or plans. A claim becomes persuasive only when the machine can perform the intended task accurately, repeatedly and with resources that remain practical as the system grows.
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