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Virtual error cancellation (VEC) is a proposed way to improve the logical result of a quantum circuit by analyzing its recorded error-syndrome history after the circuit has run. A preprint submitted to arXiv on 8 October 2026 describes the method as classical post-processing: it aims to reduce residual logical-error bias without first characterizing the noise or changing the executed circuit. Its reported performance comes from numerical simulation, not a hardware demonstration.
What virtual error cancellation means
Quantum computers can encode information redundantly so that measurements called error syndromes reveal clues about faults affecting the encoded computation. A decoder uses those clues to interpret the run and produce a logical result. Decoding does not guarantee that every logical error is identified: some errors can remain in the decoded result and bias the quantities calculated from it.
In the 2026 proposal, virtual error cancellation uses the syndrome records collected during circuit execution as additional data for estimating a better logical output afterward. The computation is not rerun with a different noise setting for this post-processing step, and the method is not described as physically undoing errors in the quantum device. The proposal instead seeks to reduce their effect on the final estimate using classical analysis of the records already produced.
The authors, Oles Shtanko, Saswata Roy, Shashwat Kumar, and Zlatko Minev, introduce the method in “Measure Now, Mitigate Later: Virtual Error Cancellation for Logical Quantum Circuits,” arXiv:2610.12400. The work was submitted on 8 October 2026 and is a preprint. Its abstract describes a method that “operates entirely in classical post-processing on universal quantum circuits”; that is the authors’ description of their proposal, not evidence of a deployed system.
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How the proposed workflow uses syndrome records
1. Run the logical circuit and record syndromes
A quantum error-correction scheme produces syndrome measurements alongside the logical computation. These records contain information about detected error patterns across the run. Conventional decoding uses syndrome information to decide how to interpret or correct the encoded computation. Virtual error cancellation treats the recorded history as useful input for a further estimation step after execution.
2. Decode during execution
The proposal allows the decoder operating during the experiment to remain relatively low-latency. A decoder in the live path has to return decisions quickly enough for the experiment’s needs. That timing constraint can limit how much computation is practical in real time.
3. Analyze the records after execution
Once the run has finished, a more computationally complex decoder can analyze the stored records. Because this later analysis is not required to meet the same real-time deadline, it may use a more involved procedure than the live decoder. The authors call this a dual-decoder arrangement: one decoder serves the experiment, while another analyzes its records afterward.
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4. Estimate a less biased logical output
The post-processing stage uses the syndrome history to estimate the logical output with the goal of reducing residual error bias. It does not alter the physical gates already applied or turn the recorded run into an error-free quantum state. The reported target is an improved result derived from the execution data.
This division between fast in-run decoding and later analysis is central to the proposal’s motivation. It offers a way to consider more demanding decoding after data collection without requiring that the same complexity fit inside the experiment’s live timing budget. The paper presents this as a proposed workflow, not a standard practice or a demonstrated product implementation.
What the reported result establishes
The preprint reports numerical simulations using a distance-7 rotated surface code. The authors say that the error of their full-stack dual-decoder algorithm decreases as the sample count grows. They also report that, in an experimentally achievable setting, the method can reach more than three orders of magnitude of suppression relative to the decoded logical error rate.
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That figure needs its full context. It is an author-reported simulation result for the studied code and setup, and the comparison is against the decoded logical error rate. It is not a measured reduction on a quantum processor, a universal performance guarantee, or a direct apples-to-apples comparison with probabilistic error cancellation or zero-noise extrapolation. The abstract’s sample-count observation also does not, by itself, specify the practical sample or computing resources needed for a particular workload.
The available description does not establish a hardware implementation, a software package, a speedup, a cost saving, or a general performance level across codes and devices. Those should not be inferred from the simulation claim. The appropriate current reading is that VEC is a research proposal with numerical evidence in one stated simulation context.
How it differs from other error-mitigation methods
“VEC” is an overloaded abbreviation, and several error-mitigation approaches share the broad goal of improving computational results. They use different information and procedures, however, so the names are not interchangeable.
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| Method | Main input or operation | Noise characterization or circuit changes | What it targets | Evidence described here |
|---|---|---|---|---|
| Virtual error cancellation (2026 proposal) | Recorded syndrome histories, analyzed in classical post-processing after a logical-circuit run | The authors present it as avoiding prior noise characterization and modified circuit experiments | Reducing residual logical-error bias in an estimated logical output | Numerical simulation of a distance-7 rotated surface code; no hardware demonstration is cited |
| Probabilistic error cancellation (PEC) | Noise characterization and sampling weighted operations to reconstruct an estimate | Depends on accurate noise characterization; uses statistical reconstruction | An unbiased estimate of an observable, not an error-corrected quantum state | IBM Quantum Learning describes the approach and cautions about sampling overhead and characterization dependence |
| Zero-noise extrapolation (ZNE) | Measurements at deliberately scaled noise levels, extrapolated toward a zero-noise limit | Changes the noise level across measurements and relies on predictable noise scaling | An extrapolated estimate of the zero-noise result | IBM Quantum Learning describes the method; no comparison benchmark with the 2026 proposal is supplied |
| Virtual error correction (2025 paper) | A protocol combining quantum error correction and quantum error mitigation | The cited paper describes virtual removal of correctable channel noise under an assumption of perfect syndrome extraction | Channel noise within the protocol’s stated assumptions | Peer-reviewed PRX Quantum paper, “Virtual Channel Purification,” published 6 May 2025 |
The clearest distinction is the source of information each approach uses. The 2026 virtual error cancellation proposal uses syndrome histories from logical-circuit execution; PEC depends on a characterized noise model and weighted sampling; ZNE uses results collected at scaled noise levels; and the 2025 virtual error correction work describes a different QEC-and-QEM protocol. These methods also differ in whether they aim at logical information or an estimate of an observable.
There is no standardized, apples-to-apples benchmark across these approaches in the cited material. Comparing a simulated logical-code result with PEC or ZNE in the abstract would therefore obscure differences in circuit type, data requirements, sampling, computational cost, and evidence level. “Better” depends on the particular workload and experimental constraints, none of which are established as a universal winner here.
Why “cancellation” does not mean the machine fixes its errors
Error mitigation and quantum error correction are related but distinct ideas. Correction uses redundancy and syndrome information to detect errors and protect encoded logical information. Mitigation seeks to improve the accuracy of a computed estimate after errors have affected the computation; it does not necessarily produce a corrected quantum state. Virtual error cancellation’s name can sound as though it cancels faults on the device, but the proposed operation is a classical, post-execution analysis.
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That distinction matters when interpreting the output. A better estimate does not show that the underlying physical error rate has fallen, nor does it establish that every run has been repaired. For the 2026 proposal, the stated aim is to reduce bias in the logical result using recorded syndromes, and the reported evidence is numerical simulation.
What to watch for when evaluating VEC claims
- Check which VEC is meant. Spell out virtual error cancellation for the 2026 preprint; virtual error correction is the name of a different protocol in the 2025 paper.
- Check the evidence level. A result from numerical simulation is not a hardware measurement, even when the authors describe its setting as experimentally achievable.
- Keep the comparison attached to the number. The reported more-than-three-orders suppression is relative to the decoded logical error rate in the authors’ simulation context.
- Separate physical correction from estimate mitigation. Post-processing stored records can change an estimate without changing the quantum execution that generated those records.
- Ask what resource is being counted. The sources described here do not establish a general overhead, practical sample requirement, or computational cost for arbitrary workloads.
- Avoid unqualified comparisons. PEC, ZNE, and VEC use different data and assumptions, and the cited sources do not provide a common benchmark.
Why the proposal may matter
Logical circuits require useful decoding, but real-time latency can constrain decoder complexity. The dual-decoder idea separates the immediate experimental task from later analysis: the experiment can use a fast decoder while retained syndrome data is examined with a more demanding procedure afterward. If the proposed estimates hold up beyond the reported simulations, this could make richer use of data that an experiment has already collected.
The proposal’s potential value is consequently specific: it offers a post-run route to mitigate residual logical bias without requiring that the most expensive analysis happen inside the real-time loop. Whether that tradeoff is useful in practice will depend on performance, data volume, and classical processing demands for a given experiment. The cited preprint does not establish those practical outcomes across hardware platforms or workloads.
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Virtual error cancellation is a 2026 preprint proposal for using quantum error-syndrome records in classical post-processing to reduce residual logical-error bias. It is distinct from probabilistic error cancellation, zero-noise extrapolation, and the earlier method called virtual error correction. Its headline suppression result is from a distance-7 rotated-surface-code simulation, not a hardware demonstration, so it is best understood as a promising research result rather than an established capability of quantum computers.
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