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Error mitigation can improve estimates from noisy logical circuits, but it cannot generally make arbitrarily deep universal quantum computation cheap. Under specified noise models and protocol assumptions, theoretical lower bounds show that the sampling needed to reach a target accuracy can grow exponentially with circuit depth; some analyses also find width-dependent costs. These are conditional results, not a single cost rule for every circuit or device, and mitigation does not replace quantum error correction.

What “limits” means for error mitigation

Error mitigation uses results from noisy executions to estimate what a circuit would have produced under ideal conditions. Because noisy data do not directly equal ideal data, mitigation procedures infer or reconstruct the desired quantity from samples. That inference can require substantially more circuit executions as the circuit or target accuracy changes. The central limit is therefore not simply whether a mitigation method can improve an estimate; it is how its sampling cost grows while doing so.

“Universal logical quantum circuits” can mean circuits built from a gate set capable of expressing general quantum computations, with operations encoded in logical qubits rather than bare physical qubits. The cited papers do not all study one identical class of universal logical circuits. They analyze different noise models, circuit structures, and mitigation protocols. Their results should be read as conditional limits on specified settings, not as one theorem assigning the same cost to every universal circuit.

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Three kinds of evidence are especially important to keep separate: mathematical lower bounds on sampling cost, resource estimates for a proposed combination of mitigation and error correction, and experimental results on particular logical circuits. Each answers a different question.

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What the lower bounds establish

Depth: broad protocol classes can face exponential sampling cost

The 2023 Physical Review Letters paper, “Universal Sampling Lower Bounds for Quantum Error Mitigation”, establishes lower bounds on the samples required for a wide class of mitigation protocols to reach a desired accuracy with high probability. Its abstract says the cost “must grow exponentially with the circuit depth for various noise models.” The result includes protocols with nonlinear postprocessing, so the obstacle is not limited to a narrow choice of estimator.

“Wide class” and “various noise models” matter. The paper identifies fundamental obstacles in the settings covered by its assumptions; it does not show that every possible workload, noise process, or future mitigation protocol has identical exponential cost. Nor does an asymptotic lower bound supply a universal run count for a particular device or circuit.

Noise model and protocol: the bound can change with the setting

The 2022 npj Quantum Information paper “Fundamental limits of quantum error mitigation” finds exponential depth scaling for mitigating local depolarizing noise in layered circuits, for its general class of protocols. It also proves optimality of probabilistic error cancellation in a specified local-dephasing setting and protocol family. These findings illustrate why a scaling claim must name the noise and the allowed methods: a result about local depolarizing noise cannot silently be transferred to correlated noise, another circuit family, or an unrestricted future protocol.

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Width: some analyses find an additional cost dimension

The 2024 Nature Physics study “Exponentially tighter bounds on limitations of quantum error mitigation” develops stronger bounds that include circuit width under particular assumptions. Its studied cases include local depolarizing noise and highly entangling circuits; it also analyzes non-unital noise. This adds width to the questions a reader should ask, but it does not justify the claim that all wide circuits necessarily incur exponential overhead. The scaling remains tied to the noise, circuit properties, and assumptions treated in that analysis.

How to interpret exponential sampling cost

An exponential lower bound describes how the required sampling overhead scales as a parameter such as depth increases under the paper’s assumptions. It is not the same thing as an experimentally measured fixed number of executions. The primary lower-bound papers report asymptotic results rather than a universal sample count for a specific logical device.

The target also matters. The bounds concern achieving a desired accuracy, and the 2023 PRL statement explicitly includes high probability. A claim about cost is incomplete unless it specifies what quantity is being estimated, what accuracy and confidence are required, and what circuit and noise setting is under discussion. A method may yield an improved estimate at one target precision while still becoming impractical when the circuit grows or the required precision tightens.

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Depth and width should not be collapsed into a single informal label such as “large circuit.” Depth tracks the number of successive layers of operations; width reflects the number of qubits involved. A result derived for layered circuits or highly entangling circuits has a structural scope. The 2024 width-dependent analysis makes that distinction particularly important: two circuits with similar depth need not fall under the same assumptions if their widths or entanglement structure differ.

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Likewise, “overhead” can refer to sampling cost, not a direct multiplication of physical qubits or a promise that the circuit will fail beyond a particular depth. Lower bounds identify a cost that a class of protocols cannot evade in the covered setting; they do not by themselves determine the practical crossover point for every implementation. Device-specific calibration, correlations, and estimator behavior would have to be established for such a prediction.

What changes when the circuit is logical?

Encoding information in logical qubits is part of quantum error correction (QEC), which aims to protect computation against physical errors through encoding and fault-tolerant operations. Quantum error mitigation (QEM), by contrast, uses noisy outcomes to improve estimates of ideal behavior. A circuit being logical does not make the sampling limits of mitigation disappear: the relevant logical circuit still has noise, and an estimator still faces the cost of extracting a sufficiently accurate result from noisy executions.

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Mitigation can nevertheless complement error correction. It may be used in logical or early fault-tolerant settings to reduce residual errors or improve estimates. That possibility is different from claiming that mitigation alone supplies scalable fault tolerance. The lower-bound papers constrain mitigation under their stated conditions; proposals and experiments combining QEC and QEM show possible uses, not a general proof that arbitrary-depth logical computation can be made inexpensive.

What combined QEC and QEM evidence shows

Study and evidence type What it reports What the result does not establish
2022 PRX Quantum, theoretical framework: “Quantum Error Mitigation as a Universal Error Reduction Technique” The proposed early-fault-tolerant framework combines QEC with probabilistic error cancellation. Its authors report modeled reductions in required physical qubits of 80% and 45% in two considered regimes. These are model-based, regime-specific comparisons, not observed universal savings, a commercial hardware benchmark, or proof of scalable mitigation for every circuit.
2025 Nature Communications, logical-qubit experiment: “Demonstrating quantum error mitigation on logical qubits” The experiment applies zero-noise extrapolation to quantum-error-correction circuits and reports reduced logical errors across the tested repetition- and surface-code circuits. Performance on those tested circuits and that implementation does not establish that mitigation scales without limit or removes the need for fault-tolerant protection.

The two rows are not competing estimates of one quantity. One is a theory paper’s model of physical-qubit resource tradeoffs in selected regimes; the other is an experimental demonstration on particular logical circuits. Neither provides a universal overhead number that can be substituted into the lower-bound results.

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How to evaluate a claim that mitigation “scales”

When reading a paper, benchmark, or announcement, check whether it provides enough detail to connect the reported improvement to the limits above:

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  • Circuit scope: What are the depth, width, layering, and entanglement properties? Does the evidence concern physical circuits, logical circuits, or a proposed fault-tolerant setting?
  • Noise assumptions: Is the noise local depolarizing, local dephasing, non-unital, correlated, or something else? Is the claim theoretical for a specified model or measured on an implementation?
  • Protocol scope: Which mitigation procedure is used, and what processing is permitted? A bound for a defined protocol class is not automatically a bound for every conceivable method.
  • Estimator target: What observable or output quantity is estimated, and what accuracy and confidence are required? “Improvement” without a target does not say how useful the estimate is.
  • Cost measure: Is the reported cost sampling overhead, physical-qubit count, or another resource? Do not treat those as interchangeable.
  • Evidence type: Is the number an asymptotic theorem, a model-based comparison, or an experimental result? Keep its qualification attached to the number.
  • Bias and variance: Does the procedure reduce error in the tested estimate, and what sampling variability or estimator assumptions accompany that result? Improvement on a measured circuit does not alone establish asymptotic scaling.

A claim is most informative when it states all of these boundaries alongside the result. Without that context, “error mitigation scales” may describe a successful demonstration in a limited regime rather than a conclusion about growing universal computations.

Where the practical boundary lies

The literature supports a qualified verdict: mitigation is useful as an error-reduction and estimation technique, including in some logical-circuit experiments, but the sampling burden can grow prohibitively with circuit size. Lower bounds show that for specified models and broad protocol classes, increasing depth can force exponential sampling cost, and certain analyses add width dependence. Those are fundamental warnings about scalability, not a universal numerical forecast for each code, device, or workload.

For a real logical workload, the decisive question is therefore not simply whether mitigation lowers observed error. It is whether the improvement remains worthwhile after accounting for the circuit’s depth and width, the actual noise structure, the estimator’s accuracy and confidence target, and the sampling resources required. Where strong scalable protection is needed, the evidence here supports treating QEM as a possible complement to QEC, not as its replacement.

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