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Short answer: A physical qubit is a single, noisy hardware element. A logical qubit is an encoded quantum state spread across many physical qubits and protected by repeated quantum-error-correction (QEC) cycles. There is no fixed physical-to-logical ratio: the number depends on the code, hardware quality, connectivity, decoder, and target logical error rate. Adding qubits reduces errors only when the physical error rate is below the code’s effective threshold.
Physical qubit versus logical qubit
What a physical qubit is
A physical qubit is one controllable quantum device in a processor. Depending on the hardware platform, it may be represented by a superconducting circuit, trapped ion, neutral atom, spin, or another quantum system. Whatever the implementation, it is exposed to decoherence, imperfect control pulses, gate errors, readout errors, leakage out of the intended two-level state, and errors while it waits idle.
When a processor reports a gate-error rate, that figure normally describes one operation under a particular test protocol. It does not automatically include measurement errors, idle errors, leakage, crosstalk, correlated faults, or the probability that an entire algorithm fails.
What a logical qubit is
A logical qubit is an encoded quantum state distributed across several physical qubits. QEC circuits repeatedly measure carefully chosen error syndromes. Those measurements reveal information about which faults probably occurred without directly measuring the protected quantum state. A classical decoder interprets the syndrome and tells the control system which correction, or frame update, to apply.
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Google Quantum AI summarizes the principle as protecting information “by encoding it across multiple physical qubits to form a ‘logical qubit.’” The logical qubit is therefore not a new, isolated hardware component. It is an error-managed abstraction implemented by a coordinated group of physical qubits, ancillas, measurements, control electronics, and decoding software.
Microsoft’s educational example uses nine physical qubits to encode one logical qubit and correct both bit-flip and phase-flip errors. That compact code is useful for understanding the idea; it is not a universal recipe for a practical fault-tolerant processor.
How quantum error correction protects information
1. Encode the state
The processor entangles data qubits with additional physical qubits so that the logical state is represented nonlocally. In a surface-code implementation, nearby physical qubits are arranged as a patch or lattice. The logical information is stored in collective properties of the patch rather than in any one device.
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Ancilla qubits interact with data qubits and are measured. The resulting syndrome bits indicate whether local parity checks changed. A syndrome can identify the type and location pattern of a likely fault while leaving the logical amplitudes unmeasured.
3. Decode the measurement record
A decoder processes the stream of syndrome results, often in real time. It estimates the most likely physical error chain and determines whether the processor should apply a correction or update a software “Pauli frame.” Decoder latency matters: if results arrive too slowly, errors can accumulate before feedback is available.
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4. Repeat throughout the computation
QEC is not a one-time setup step. Syndrome extraction and decoding must continue while logical gates, movement, measurement, and reset operations take place. A demonstration that prepares an encoded state once is less demanding than a logical qubit that survives many correction rounds and executes a sequence of fault-tolerant operations.
How many physical qubits make one logical qubit?
There is no universal conversion ratio. Overhead changes with the code family, code distance, operation set, connectivity, physical error model, decoder, and the logical error rate required by the application. Even within one architecture, increasing code distance generally requires more physical qubits to obtain stronger protection.
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Random freezes, missing sound and display glitches usually trace back to one bad driver. Find and replace yours safely.Free scan · under a minute| Example | Physical qubits per logical qubit | What it demonstrates | Important qualification |
|---|---|---|---|
| Microsoft nine-qubit educational code | 9 to 1 | Encodes one logical qubit and corrects bit-flip and phase-flip errors | Teaching example; not a general hardware overhead for fault-tolerant machines |
| Google experiment | 49 versus 17 physical qubits | A logical qubit encoded in 49 physical qubits outperformed one encoded in 17 | Experimental comparison, not a universal ratio for every processor or code |
| Google surface-code design example | 577 physical qubits at code distance 17 | Projected logical error rate below 1 in 106 | Projection under the stated assumptions and noise model; it does not mean every logical qubit needs exactly 577 qubits |
The 49-versus-17 result is valuable because it tests whether larger code size actually improves logical performance. The 577-qubit figure illustrates how demanding a target error rate can create substantial overhead. These numbers should not be averaged or used as a shopping-list specification for a future processor.
What a physical error rate means
Microsoft reports that state-of-the-art quantum computers typically have physical gate-error rates from about 1% to 0.1% per operation (on its 2026 educational page). This is a broad instructional range, not a specification for every processor, qubit type, gate, or measurement protocol.
Always identify the operation and denominator. A “one-percent error rate” could mean the chance that a particular gate is wrong, while a different percentage might describe a measurement, an idle interval, a complete correction cycle, or an algorithm-level failure.
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| Term | Meaning | Why the distinction matters |
|---|---|---|
| Gate error | Probability that a specified physical gate produces an incorrect result under a stated benchmark | Different gates and pulse schedules can have different rates |
| Readout error | Probability that measurement reports the wrong classical value | It can dominate even when gate operations are relatively accurate |
| Idle error | Error accumulated while a qubit waits | Long schedules and slow measurements increase exposure |
| Leakage | Population leaving the intended computational states | Leakage can persist across cycles and create correlated faults |
| Correction-cycle failure | Probability that one complete round of syndrome extraction and decoding leaves a logical fault | This is closer to QEC performance than a single-gate number |
| Logical error rate | Chance that an encoded operation or correction interval still fails after QEC | The unit must be stated: per gate, measurement, round, cycle, or algorithmic operation |
What is a logical error rate?
A logical error rate is the residual probability that the encoded computation is wrong after syndrome processing and decoding. It is a property of the whole QEC stack, not simply the average of the physical-qubit error rates. The code, circuit, code distance, decoder, measurement schedule, and noise correlations all affect it.
Two papers can both report “10−3” and still be incomparable if one value is measured per surface-code cycle and the other per logical gate. A useful report states:
- the denominator: gate, measurement, round, cycle, or complete algorithmic operation;
- the code family and code distance;
- the number and arrangement of physical qubits;
- the physical error model and operation-specific benchmarks;
- the decoder and whether decoding was performed online or offline; and
- the experiment’s duration, workload, and confidence interval when available.
A lower percentage is meaningful only when these conditions are comparable. A logical-qubit lifetime is another useful metric: it measures how long the encoded state remains usable before an uncorrected logical fault becomes likely.
Why the error-correction threshold matters
Every QEC code has an effective threshold under a particular noise model and implementation. Below that threshold, increasing code distance can make logical errors fall rapidly. Above it, adding more physical qubits adds more opportunities for faults than the decoder can handle.
Google’s surface-code explanation describes the failure mode directly: when physical-qubit errors are too frequent, extra errors overwhelm correction, so making the lattice larger can make processor performance worse. This is why “more qubits” does not automatically mean “fewer errors.”
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The 2022 Nature experiment was an important below-threshold milestone: increasing surface-code size began to improve logical performance. The relevant evidence was the direction of improvement with code size, not merely the existence of a large lattice.
Factors that can prevent improvement
- High measurement error: Incorrect syndrome bits can make the decoder chase errors that never happened.
- Leakage: A qubit outside the computational subspace may corrupt several neighboring checks or persist across rounds.
- Correlated errors: Crosstalk, control electronics, or environmental events can defeat assumptions of mostly independent faults.
- Connectivity limits: Extra routing operations introduce additional gates and therefore more opportunities for error.
- Decoder latency: Slow classical processing delays correction or frame updates.
- Uneven device quality: A few poor qubits or couplers can limit the entire code patch.
What error rate is good enough for fault-tolerant quantum computing?
There is no single “good enough” percentage independent of the workload. The physical error rate must be below the relevant threshold for the selected code and hardware, and the resulting logical error rate must be low enough for the intended computation’s length and sensitivity.
For a short demonstration, a logical error every few thousand operations may be measurable and informative. A long algorithm with millions or billions of logical operations needs a much lower per-operation failure probability, plus reliable state preparation, transport, measurement, reset, and real-time control. A target such as below 1 in 106 in Google’s distance-17 design example is therefore a design point under stated assumptions, not a universal pass/fail line.
A practical way to judge “good enough”
- Define the workload. Estimate the number and type of logical gates, measurements, correction cycles, and parallel operations.
- Choose the fault-tolerant code and architecture. Include connectivity, ancilla requirements, and the available decoder.
- Measure operation-specific physical errors. Separate gates, readout, reset, idle periods, leakage, and correlated faults.
- Demonstrate below-threshold scaling. Compare logical performance at multiple code distances; larger patches should improve the relevant metric.
- Set a system-level failure budget. Account for state preparation, logical gates, measurements, decoding, and the complete algorithm rather than one benchmark.
How to compare quantum-error-correction demonstrations
Use the following checklist before comparing two claimed logical-qubit results:
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- Logical metric: Is the logical error rate expressed per gate, round, cycle, or another explicit unit?
- Code details: Which code family and code distance were used?
- Scale: How many physical qubits, ancillas, couplers, and measurement channels were active?
- Connectivity: Does the layout require additional routing operations?
- Scaling evidence: Does increasing code size reduce logical errors, or is only one size shown?
- Lifetime: How many correction rounds or logical operations were completed before failure?
- Decoder: Was decoding low-latency and real time, or performed after data collection?
- Workload: Did the system execute repeated fault-tolerant operations, or only prepare and measure an encoded state?
This framework prevents a small educational code, a one-time encoded-state demonstration, and a continuously corrected logical processor from being treated as equivalent achievements.
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What makes a logical qubit scalable?
Microsoft’s 2026 scalable-logical-qubit proposal sets a demanding definition. A scalable logical qubit must remain protected through repeated QEC, support fault-tolerant universal operations, use low-latency real-time decoding and feedback, and be replicable to the hundreds or thousands needed by useful applications.
That definition highlights a systems issue: one reliable logical qubit is not enough for most algorithms. The processor must manufacture and operate many logical qubits while maintaining calibration, synchronizing measurements, routing interactions, handling leakage, and decoding a large stream of syndrome data. The physical-to-logical overhead therefore includes classical electronics, control bandwidth, cooling or trapping resources, and software as well as the qubits counted in the code patch.
Tools for learning and experimentation
Google’s developer guidance describes a surface-code patch as a square of nearest-neighbor physical qubits working together as one more reliable logical qubit. For circuit and QEC experiments, it points readers to the open-source Cirq, Stim, and Crumble tools. These can help visualize stabilizers, inject noise, test decoders, and study how logical performance changes with code distance. They are software resources for learning and simulation; using them does not demonstrate a particular commercial processor or hardware result.
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Common misconceptions
“A logical qubit is just a better physical qubit.”
No. It is a coordinated encoding implemented by many physical qubits and repeated measurements. Its reliability depends on the entire control, decoding, and feedback loop.
“Nine physical qubits always make one logical qubit.”
Nine is the count in Microsoft’s instructional bit-and-phase-flip example. Practical surface-code overhead can be tens, hundreds, or more physical qubits for one logical qubit, depending on the target and assumptions.
“The lowest physical gate-error percentage wins.”
Not necessarily. Readout, leakage, idle errors, connectivity, correlated faults, decoder speed, and below-threshold scaling can matter as much as the headline gate number.
“More physical qubits automatically reduce errors.”
Only below the relevant threshold and only when the added qubits, measurements, decoder, and connectivity preserve the code’s assumptions. Above threshold, a larger lattice can perform worse.
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Physical qubits are the noisy hardware; logical qubits are encoded states protected across many physical qubits. The right question is not “How many physical qubits equal one logical qubit?” but “How much hardware does this code and target logical error rate require on this device?” Trust a QEC claim when it defines its error-rate denominator, reports the code and distance, shows improvement as code size grows, and demonstrates repeated fault-tolerant operation with practical decoding and feedback.
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