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There is no universal accelerator winner. The right choice depends on the models you run, training or inference goals, precision, memory needs, scaling pattern, software stack, deployment location and measured cost at realistic utilization. NVIDIA and AMD sell data-center GPU platforms; Google TPU, AWS Trainium and Microsoft Maia are cloud-provider accelerators designed around their providers’ infrastructure and software.
Start with a representative workload rather than a chip specification. Test the exact model, operators, sequence lengths, batch sizes, precision, concurrency and multi-node topology you expect in production. Then compare throughput, latency, memory headroom, uptime, engineering effort and total cost. Vendor benchmark claims are useful for forming a shortlist, but they are not a neutral ranking across all five platforms.
What you are actually choosing
A modern AI accelerator is part of a system. The silicon, compiler, kernels, runtime, networking, server design, orchestration and cloud service all affect the result. A model that runs efficiently on one platform may need operator substitutions, a different quantization path or substantial kernel work on another.
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NVIDIA and AMD offer general-purpose accelerator platforms for training, fine-tuning, inference and mixed AI/HPC workloads. They can be purchased as servers or accessed through cloud instances. This gives you more control over hardware placement and provider choice, but also leaves more responsibility for drivers, images, cluster scheduling, firmware, networking and lifecycle management.
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Cloud-native accelerators
Google TPU, AWS Trainium and Microsoft Maia are developed for use inside their respective cloud environments. Their value is not only the processor: each is paired with a provider-specific compiler, SDK, network fabric, managed service and regional capacity plan. The trade-off is tighter dependence on that provider’s APIs, regions and operational model. A market-structure report from the UK Competition and Markets Authority describes TPUs, Trainium/Inferentia and Maia as cloud-provider-developed accelerators used internally and offered to cloud customers: CMA market report.
Comparison at a glance
| Platform | Typical fit | Published memory or performance figure | Software and deployment considerations |
|---|---|---|---|
| NVIDIA data-center GPUs | Broad training, fine-tuning, inference and mixed workloads where existing CUDA-based software is important | Not stated in the supplied sources; verify the exact accelerator, server and cloud instance | Validate CUDA version, kernels, container images, collective libraries and provider availability for the selected model |
| AMD Instinct with ROCm | Training, inference and AI/HPC environments able to use ROCm or willing to port kernels | AMD states 288 GB HBM3E for MI350X and MI355X | ROCm 7.0 supports PyTorch, TensorFlow, ONNX, JAX/XLA, Triton and orchestration integrations; exact operator coverage still matters |
| Google TPU 8t | High-throughput training and inference designed around Google Cloud services | Google claims nearly 3× the compute performance of previous generations; this is not a cross-vendor benchmark | Evaluate the model’s XLA/compiler path, TPU topology, region and data movement alongside Google Cloud’s GPU alternatives |
| AWS Trainium | Large-scale training and inference that can use AWS Neuron and AWS networking and services | AWS says Trainium3 delivers up to 2× Trainium2 MXFP8 compute throughput | Neuron SDK, orchestration, networking and AWS services are co-designed; include migration and service dependence in the decision |
| Microsoft Maia 200 | Inference workloads deployed through Azure | 216 GB HBM3e and 7 TB/s bandwidth, according to Microsoft | Native FP8/FP4 tensor cores; Maia SDK preview, PyTorch integration, Triton compiler support and optimized kernels |
Every number in this table comes from the named vendor and uses that vendor’s definitions. Memory capacity is not a performance ranking, and a claimed generation-to-generation improvement is not evidence of equal improvement on your model.
Software fit often decides the outcome
Model and operator coverage
Check every operation in the production graph, including custom attention, fused normalisation, sparsity, retrieval components, tokenisation boundaries and post-processing. A framework may import successfully while silently falling back to slower kernels. Measure those fallbacks instead of treating framework compatibility as proof of portability.
Frameworks, compilers and kernels
AMD describes ROCm 7.0 support for PyTorch, TensorFlow, ONNX and JAX/XLA, plus Triton and orchestration integrations in its platform overview: AMD ROCm 7.0 overview. Support at the framework level does not guarantee that your model’s exact operators, quantization format or distributed-training path are optimized.
AWS positions Trainium as a co-designed chip, server, network, software and services stack centered on the Neuron SDK: AWS Trainium. Estimate the work required to convert model code, replace unsupported operations, tune Neuron graphs and integrate AWS monitoring and deployment.
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Microsoft says the Maia SDK includes PyTorch integration, Triton compiler support and optimized kernels. The SDK is described as being in preview, so confirm its current feature set, support policy and production terms before committing: Microsoft Maia 200 announcement.
Precision and quantization
Record the precision used in every test: FP32, BF16, FP16, FP8, FP4 or a vendor-specific microscaling format. Lower precision can increase throughput and reduce memory use, but only if accuracy, calibration and kernel support meet your requirements. Do not compare an MXFP4 result with an NVFP4 result as though the labels alone establish equivalent numerical behavior.
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Capacity determines whether a model and batch can fit without sharding, offloading or reducing context length. Bandwidth affects how quickly weights and activations move during attention, matrix operations and decoding. Record both the per-accelerator amount and the usable capacity after runtime reservations.
| Published figure | Platform and source | How to interpret it |
|---|---|---|
| 288 GB HBM3E | AMD MI350X and MI355X, in AMD’s account of MLPerf Training 6.0 | Large capacity can provide headroom for larger batches or fewer shards; it does not establish end-to-end speed |
| 216 GB HBM3e; 7 TB/s | Microsoft Maia 200 | Capacity and bandwidth are product specifications for Maia’s architecture, not a direct comparison with AMD or NVIDIA |
| NVIDIA memory and bandwidth | Not established in the supplied sources | Use the exact NVIDIA product and system documentation for your intended deployment |
| TPU and Trainium memory | Not stated in the supplied sources | Obtain the instance or slice specification for the region and service you will use |
For a real sizing exercise, calculate weight memory, optimizer state, gradients, activations, KV cache and framework overhead separately. Test the largest production sequence length and concurrency, not only a small synthetic batch.
What the published benchmark evidence does—and does not—show
AMD’s MLPerf Training 6.0 account
AMD reports that MI355X came within 5% of NVIDIA B200 on Llama 2-70B fine-tuning and within 6% on Llama 3.1-8B pre-training. AMD identifies its format as MXFP4 and NVIDIA’s as NVFP4: AMD MLPerf Training 6.0 results. These are bounded results for named workloads, precision formats and benchmark conditions. They do not show that the two platforms perform within those margins on every model, batch size, sequence length or scaling configuration.
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AMD’s eight-GPU inference comparison
AMD’s published inference material compares an eight-GPU MI355X system with an eight-GPU B200 system running DeepSeek R1 through SGLang. The reported software environments include a pre-release ROCm 7.0 build and CUDA 12.8, and the host server configurations differ: AMD ROCm comparison. Treat any throughput number from that exercise as specific to those systems, software versions and test settings. AMD notes that results can vary with hardware, software and configuration.
Google TPU 8t
Google Cloud describes TPU 8t as a high-throughput training system and claims nearly three times the compute performance of previous generations. The statement is Google’s generation-to-generation claim, not a neutral comparison with NVIDIA, AMD, Trainium or Maia: Google Cloud AI infrastructure announcement. Evaluate TPU on the XLA graph, topology and service conditions your application will use.
Trainium3
AWS says Trainium3 provides up to twice the MXFP8 compute throughput of Trainium2: AWS Trainium product information. “Up to” describes a maximum stated by AWS under its own conditions. Measure the complete training or serving workflow, including compilation, communication, storage, host work and idle capacity.
Maia 200 comparisons
Microsoft says Maia 200 delivers three times the FP4 performance of third-generation Trainium, exceeds Google’s seventh-generation TPU in FP8 and offers 30% better performance per dollar than Microsoft’s current fleet. These are Microsoft’s own comparisons, not independent findings, and the announcement does not make them a universal ranking. Verify the tested workloads, availability and commercial terms before using any of those figures in a business case: Microsoft Maia 200 announcement.
Match the platform to the workload
Pre-training
Pre-training stresses sustained matrix throughput, high-bandwidth memory, collective communication, checkpointing and cluster reliability. Compare time to a target loss or token count, not isolated device throughput. Multi-node all-reduce behavior, topology and recovery from failed workers can outweigh a single-device specification.
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Fine-tuning
Fine-tuning often uses smaller models or parameter-efficient methods, making software readiness and fast iteration more important than maximum cluster scale. Test the exact adapter method, sequence length, evaluation loop and checkpoint format. The AMD-versus-B200 Llama results are relevant only to the named fine-tuning task and precision formats.
Batch inference
Batch inference can trade latency for utilization. Measure tokens per second at the batch sizes your queue can sustain, then include model-loading time, autoscaling delay and memory fragmentation. A platform that wins at a large offline batch may be unsuitable for a low-volume service with strict response deadlines.
Interactive inference
Interactive serving requires tail-latency measurements, usually p95 and p99, at realistic concurrency. Capture time to first token, inter-token latency, prompt length, generated-token length and KV-cache growth. Maia 200 is explicitly positioned by Microsoft as an inference accelerator, but its regional availability and SDK maturity must be confirmed for your tenant.
Mixed AI and HPC
If the same cluster runs simulation, analytics or non-AI codes, include those workloads in scheduling and capacity plans. General-purpose GPUs may reduce platform fragmentation, while a provider accelerator can be attractive when the surrounding cloud service already matches your data and orchestration architecture.
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Deployment and provider constraints
On-premises or hosted GPUs
Owning or leasing GPU servers can provide control over data locality, software versions and utilization. Budget for power, cooling, networking, spare capacity, firmware updates, driver qualification and staff to operate the cluster. Hosted GPU services reduce procurement and facility work but still vary by region, quota and instance generation.
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Google Cloud TPU
TPU is most compelling when the team already uses Google Cloud storage, networking, orchestration and monitoring, and the model compiles cleanly through the TPU software path. Confirm the exact TPU generation, slice size, region, reservation process and egress implications. Google also offers NVIDIA GPU platforms, so compare both paths inside the same data and service environment.
AWS Trainium
Trainium’s Neuron SDK and AWS-integrated networking and services can simplify a large AWS deployment once the model is supported. The same integration creates switching costs: account for code changes, image pipelines, observability, procurement commitments and the possibility that a required operator or framework feature arrives later than your project schedule.
Microsoft Maia
Microsoft says Maia 200 is deployed in the US Central region near Des Moines and that US West 3 near Phoenix is next. The announcement describes the Maia SDK as preview software. Confirm current access, quota, SLA, supported regions and production support before designing around those locations.
A practical evaluation method
- Freeze the workload definition. Record model revision, tokenizer, prompt and completion lengths, training data or evaluation set, batch size, concurrency, target accuracy and checkpoint policy.
- List software dependencies. Inventory framework versions, custom CUDA or Triton kernels, distributed libraries, quantization tools, inference server, data loaders and monitoring agents.
- Build a fit matrix. Mark each operator and feature as native, supported through a documented path, requiring a port or unavailable. Include compiler and container versions.
- Size memory. Calculate weights, optimizer state, gradients, activations, KV cache and runtime overhead. Test worst-case sequence length and concurrency with safety headroom.
- Run single-device tests. Measure warm-up, steady-state throughput, p50/p95/p99 latency, energy or host utilization where available, and accuracy after quantization.
- Run scale-out tests. Use the intended node count and measure scaling efficiency, collective communication, checkpoint time, restart behavior and network saturation.
- Model production economics. Include accelerator charges, host and storage charges, data transfer, reserved capacity or commitments, engineering hours, operations, failed runs and expected utilization.
- Perform a portability test. Rebuild the deployment from a clean environment and document every manual workaround. A platform is not portable if only one engineer can keep it running.
- Make a reversible decision. Keep an alternative backend tested far enough that a region outage, quota limit, SDK change or price change does not stop service.
Calculate cost per useful result, not cost per chip-hour
For training, divide the complete run cost by tokens processed at the target quality or by the time required to reach the target loss. Include failed and repeated runs caused by instability or debugging. For inference, calculate cost per million input and output tokens at the required latency percentile and utilization.
Engineering cost is part of total cost. Add model-porting time, kernel optimization, compiler debugging, on-call coverage, capacity planning and migration risk. A lower listed accelerator rate can lose its advantage if utilization is poor or the software path requires months of specialized work.
Prices, quotas, instance access and regional availability change. The supplied material does not establish a directly comparable price-performance result across NVIDIA, AMD, Google, AWS and Microsoft, so obtain current provider quotes for your geography and date.
Common failure modes and fixes
The model runs but is unexpectedly slow
- Profile operator fallbacks and host-to-device transfers.
- Check that the intended precision and fused kernels are actually active.
- Compare achieved memory bandwidth and accelerator utilization with a known-good reference.
- Validate compiler flags, graph capture and serving-batch settings.
The model does not fit
- Separate weight, activation and KV-cache usage before changing precision.
- Reduce shard size or sequence length only if the service objective allows it.
- Test quantization accuracy and calibration on the production evaluation set.
- Consider a larger-memory device or a different parallelism strategy.
Multi-node scaling collapses
- Measure communication time and collective-operation efficiency.
- Check topology, placement, fabric configuration and cross-zone traffic.
- Use the provider’s recommended node shape and software image before custom tuning.
- Benchmark the exact worker count; two devices can scale well while 64 do not.
A cloud accelerator is unavailable
- Confirm region, quota, reservation and account eligibility early.
- Keep a tested GPU or second-provider path for overflow and outages.
- Separate model artifacts and orchestration from provider-specific launch code.
- Recheck SDK preview status and support commitments before production rollout.
Decision rules
- Choose NVIDIA GPUs when your existing model, kernel and operations stack is already qualified there and the measured productivity advantage outweighs alternative platform savings.
- Choose AMD Instinct when its memory capacity, ROCm support and tested performance fit the workload and your team can validate or port any custom kernels.
- Choose Google TPU when the model compiles efficiently for TPU and Google Cloud’s topology, regions and data services match the deployment.
- Choose AWS Trainium when Neuron supports the model path and AWS integration reduces the cost of running a large, steady workload.
- Choose Microsoft Maia only after confirming Maia 200 access, SDK maturity, regional placement and inference economics for your Azure workload.
The defensible selection is the platform that completes your representative workload with the required accuracy, latency, reliability and operational effort at the lowest measured total cost. No published figure in this comparison replaces that test.
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