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There is no universal winner. Nvidia remains the lower-risk choice for teams that depend on CUDA, broad framework support, and predictable deployment tooling. Huawei Ascend can be compelling where Chinese supply, local support, or a controlled CANN-based stack matters, but its practical result depends heavily on model operators, compiler maturity, system topology, and the engineering work required to port software.
Peak arithmetic figures do not settle the question. The Center for Security and Emerging Technology (CSET) reported up to 320 FP16 TFLOPS for a first-generation Ascend 910 model and up to 400 FP16 TFLOPS for the highest-performing 910B model it analyzed. Those are analyzed specifications, not delivered model throughput or an apples-to-apples comparison with an Nvidia H100, H200, or newer generation. A 2025 Center for Strategic and International Studies (CSIS) report, citing a DeepSeek evaluation, said Ascend 910C delivered roughly 60% of H100 inference performance, while the same evaluation found it unattractive for training. That result is useful evidence, but the cited passage does not publish a reproducible matched benchmark protocol.
The short verdict
Choose between Ascend and Nvidia by workload and deployment constraints, not by a single TFLOPS number.
- For CUDA-heavy training or production systems that need the broadest software support: Nvidia is generally the safer engineering choice because CUDA and its surrounding libraries, profilers, kernels, and debugging tools are mature and widely integrated.
- For inference in a market where Nvidia supply is restricted or Huawei support is already established: Ascend may be practical, especially when the model has good CANN operator coverage and the buyer can validate latency and throughput on the exact server configuration.
- For a new large-model training project: do not assume either platform will deliver advertised peak rates. Run a representative pilot that measures time to train, checkpoint recovery, scaling efficiency, and engineering hours as well as tokens per second.
- For procurement after 2026: treat announced products and export-policy reports as provisional. Confirm shipment status, import rules, licensing, support, and independent benchmarks for the destination and model you actually intend to deploy.
What the two platforms actually are
Ascend is an accelerator family plus a complete Huawei stack
Ascend is not a single chip. It is a family of Huawei AI accelerators used in integrated systems and accompanied by the CANN software stack. Huawei positions Ascend solutions for training and inference from data center to edge. That statement describes the company’s intended product scope; it does not demonstrate equal readiness or performance for every model, framework, precision, or server.
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The practical unit of comparison is therefore an Ascend configuration: accelerator model, host system, memory, interconnect, CANN version, framework integration, and serving or training software. A bare chip specification omits most of the variables that determine delivered performance.
Nvidia is a GPU platform built around CUDA
Nvidia’s data-center GPUs are similarly inseparable from CUDA and its libraries and tools. CUDA support commonly reaches the framework, kernel, communication, profiling, quantization, and observability layers used by a production team. That breadth is a platform advantage, not merely a chip advantage. It can reduce the work needed to move an existing training or inference service into production.
This comparison does not establish a single Nvidia model as the universal counterpart to every Ascend product. H100, H200, and later generations differ in memory, interconnect, software support, and availability. A valid comparison names the exact GPU, server, precision, model, and software versions.
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| Figure or claim | Owner and date | What it measures | What it does not prove |
|---|---|---|---|
| Up to 320 FP16 TFLOPS | CSET, 2023 | Maximum reported for the highest-performing first-generation Ascend 910 model in CSET’s technical analysis | Not delivered model throughput and not a matched benchmark against an Nvidia system |
| Up to 400 FP16 TFLOPS | CSET, 2023 | Maximum reported for the highest-performing Ascend 910B model CSET reviewed | Not directly comparable to H100, H200, or a later Nvidia generation without common test conditions |
| Roughly 60% of H100 inference performance | CSIS, 2025, reporting a DeepSeek evaluation | An attributed, workload-specific inference result for Ascend 910C | Not a general “910C is 60% as fast” rule; the cited passage does not provide a reproducible public benchmark protocol |
| 8 EFLOPS FP8 and 16 EFLOPS FP4 | Huawei, 2025 keynote | Company-announced compute and interconnect figures for a planned Atlas 950 SuperPoD | Not independently tested performance and not evidence that the system had shipped |
CSET notes that the difference between the 910 and 910B nominal peaks reflects clock speed, a vector-unit change, and a change in how Huawei accounted for performance. Memory behavior and vector execution determine whether a workload can approach those figures. A model that is limited by memory traffic, communication, unsupported operators, or synchronization may use only a fraction of peak arithmetic throughput.
Inference and training are different buying decisions
Inference: latency, throughput, and utilization matter together
Inference has at least two common operating points. Interactive services prioritize tail latency and predictable response time at a given concurrency. Batch generation prioritizes tokens per second, request throughput, and cost per token. A device can look strong in one mode and weak in the other.
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The CSIS account of DeepSeek’s evaluation is the clearest workload-specific signal in the available evidence: Ascend 910C was reported at roughly 60% of H100 inference performance. Because the protocol, model version, quantization, batch size, sequence lengths, concurrency, and software versions are not disclosed in the cited passage, use the number as a directional signal rather than a procurement guarantee.
For an inference comparison, record:
- Model checkpoint and serving engine version.
- Precision or quantization format, including any calibration method.
- Prompt and generated-token lengths.
- Batch size, concurrency, and request mix.
- Time to first token, inter-token latency, p50 and p99 latency, and sustained tokens per second.
- Power, cooling, host CPU, network topology, and number of accelerators.
Training: time to a useful checkpoint is the real metric
Training performance includes forward and backward pass speed, optimizer work, collective communication, memory capacity, checkpointing, restart behavior, and scaling efficiency across devices. A chip that has high nominal FP16 throughput can still lose in a distributed run if communication or software synchronization dominates.
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CSIS reported that DeepSeek found the 910C unattractive for training at the time of its evaluation. That is an important warning against inferring training competitiveness from the 910C inference figure or from peak specifications. It is not proof that every Ascend training configuration is unsuitable: model architecture, batch size, parallelism strategy, CANN release, and operator coverage can change the outcome.
Huawei’s product positioning explicitly covers training as well as inference. In a September 2025 keynote, Huawei executive Eric Xu said, “The next chip is the Ascend 950DT, which is optimized for both the decode stage of inference and for model training.” This is a roadmap and positioning statement, not an independent training benchmark.
Software is often the deciding factor
CANN and the Ascend migration surface
CANN is Huawei’s software stack for Ascend. Porting a model generally involves more than changing a device string. Teams may need to replace CUDA-specific kernels, check framework operators, adapt collective communication, tune memory layouts, validate numerical behavior, and build new profiling and recovery workflows.
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MERICS’ July 2025 assessment raised concerns about software maturity, stability, and cross-generation compatibility for Ascend. Those observations are time-stamped rather than permanent; Huawei subsequently announced a CANN Technical Steering Committee and open-source collaboration plans. Greater openness can improve participation and portability, but an announcement does not establish parity with CUDA or remove application-specific migration work.
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CUDA’s advantage is accumulated tooling
CUDA is Nvidia’s software platform, surrounded by libraries, compiler components, profilers, communication primitives, and framework integrations. Mitsui describes this ecosystem as a significant migration barrier. For a team whose code already depends on CUDA kernels or mature Nvidia libraries, the cost of switching can exceed the difference in chip purchase price.
That advantage is not identical to guaranteed performance. A CUDA application can still require kernel tuning, quantization changes, memory optimization, or a newer library release to perform well on a particular Nvidia generation. The difference is that the starting point and diagnostic tooling are usually more familiar to existing CUDA teams.
What a serious porting project should include
- Inventory dependencies. List every CUDA kernel, custom extension, collective-communication call, fused operator, quantization path, monitoring hook, and deployment container.
- Build a minimum model path. Run a representative forward pass on Ascend using the target CANN and framework versions before attempting full-scale training.
- Measure operator coverage. Record unsupported or fallback operators, precision changes, graph breaks, host-device transfers, and numerical differences.
- Port performance-critical code. Replace custom kernels and tune memory layout, fusion, and communication rather than accepting a functional but slow fallback.
- Validate quality. Compare loss curves, evaluation scores, generation outputs, and quantization accuracy against the reference implementation.
- Test failure recovery. Exercise checkpoint creation, restart after a device failure, node replacement, job cancellation, and partial-cluster recovery.
- Price engineering time. Count staff hours and elapsed calendar time to reach the target throughput; include maintenance for future CANN or framework upgrades.
Memory, interconnect, and scaling can outweigh chip peaks
Large-model workloads are constrained by memory capacity and bandwidth as well as arithmetic. CSET describes memory changes between Ascend 910 variants, but the cited material does not establish a single capacity or bandwidth number that can be used as a universal comparison. Record those values for the exact accelerator and server under consideration.
At multi-device scale, topology matters. Measure accelerator-to-accelerator bandwidth, host links, network fabric, collective-communication efficiency, and how many devices share a node or rack. Two systems with similar per-device arithmetic can have very different training times if one spends more time exchanging activations, gradients, or expert-routing data.
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For each candidate system, document:
- Memory capacity and usable capacity after runtime reservations.
- Measured bandwidth for the model’s access pattern.
- Interconnect type and topology inside a server and between servers.
- All-reduce, all-gather, and other collective times at the intended scale.
- Checkpoint bandwidth and recovery time.
- Power, cooling, rack density, and networking requirements.
Roadmaps should not be treated as current performance
Huawei’s September 2025 keynote projected Ascend 950DT availability for the fourth quarter of 2026 and described it as targeting inference decode and training. The keynote also presented an Atlas 950 SuperPoD plan with company-reported figures of 8 EFLOPS in FP8 and 16 EFLOPS in FP4. These are Huawei announcements for a planned product and system; they are not independent benchmark results.
As of a purchase decision, verify whether the product has actually shipped, which configurations are orderable, what software release supports them, and whether independent tests exist for your model. Do not substitute a roadmap figure for a delivered quote or a measured pilot.
Availability depends on geography and policy
A buyer may not be able to obtain the same accelerator in every country. Supply, export licensing, local import decisions, service coverage, and approved system configurations all affect the practical choice. Mitsui’s reporting describes changing United States policy around H200 and Chinese import restrictions in early 2026; those policy conditions can change and should not replace a check of current official rules.
Before signing a contract, obtain written confirmation of:
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- Any export license, end-use, or customer-eligibility conditions.
- Lead time, allocation, spare parts, and on-site support.
- Access to required CANN or CUDA versions and security updates.
- Cloud or colocation availability if owning hardware is impractical.
A practical comparison framework
| Decision axis | Questions to answer | Why it matters |
|---|---|---|
| Workload | Pretraining, fine-tuning, batch inference, or interactive low-latency inference? | Each mode stresses arithmetic, memory, communication, and latency differently. |
| Model operating point | Which model version, precision, sequence length, batch size, and concurrency? | Changing any of these can reverse a ranking. |
| Measured result | What throughput, p50/p99 latency, and time-to-checkpoint were measured under identical conditions? | Peak specifications do not predict application performance reliably. |
| Software effort | How many operators, kernels, tools, and recovery paths must be ported or rewritten? | Engineering time can dominate hardware savings. |
| Scaling | What happens when the job expands from one device to one node and then to the target cluster? | Communication and topology determine distributed efficiency. |
| Supply and geography | Can the buyer legally obtain, operate, service, and expand the system? | A theoretically superior device is useless if it cannot be delivered or supported. |
| Total deployment cost | What are the system, power, cooling, networking, software, and support costs? | No comparable current cost dataset is established here; collect quotes for the actual configuration. |
How to run an apples-to-apples pilot
- Freeze the workload. Select a real model, fixed checkpoint, data sample, precision, sequence lengths, batch sizes, and concurrency targets.
- Freeze the software. Record framework, compiler, runtime, driver, CANN or CUDA, kernel, serving, and communication-library versions.
- Match the system boundary. Compare complete servers or clusters, including host CPUs, memory, networking, storage, and cooling—not accelerator cards in isolation.
- Warm up and repeat. Exclude initialization from steady-state measurements, run enough iterations to expose thermal or memory effects, and report variance.
- Capture quality and reliability. Check numerical accuracy, output quality, error rates, device resets, checkpoint recovery, and long-run stability.
- Report engineering effort. Include porting hours, blocked operators, custom kernels, debugging time, and maintenance burden.
- Test the intended scale. A one-device result is insufficient for a multi-node training purchase; measure the exact node count and topology you will deploy.
Common mistakes and how to avoid them
Comparing TFLOPS as if they were tokens per second
Arithmetic peak is a ceiling under specified precision and execution assumptions. Memory stalls, unsupported operations, communication, and scheduling prevent many applications from reaching it. Use end-to-end model measurements.
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Turning one reported inference result into a universal ranking
The roughly 60% H100 figure concerns a reported 910C inference evaluation. It does not specify every model or serving mode and should not be reused as a training or total-cost claim.
Assuming vendor scope equals production readiness
Huawei’s support for training and inference is a product-positioning claim. Confirm framework support, operator coverage, debugging, checkpointing, and scaling for your particular model.
Ignoring migration and lifecycle work
A successful first run can conceal months of kernel, compiler, monitoring, and upgrade work. Include those tasks in the business case and require a support plan for future software releases.
Buying against a roadmap date
A projected Q4 2026 availability date is not a shipment commitment or an independent performance result. Require an orderable configuration, delivery terms, and acceptance benchmarks.
Which platform fits which situation?
| Situation | More defensible starting point | Condition |
|---|---|---|
| Existing production stack built around CUDA | Nvidia | Confirm the target GPU, library versions, and scaling behavior; do not assume zero tuning. |
| Chinese deployment with established Huawei procurement and support | Ascend | Validate CANN operator coverage, model quality, latency, and cluster scaling on the offered system. |
| Interactive inference with strict tail-latency targets | Either | Run the same model and request mix; prioritize p99 latency, memory headroom, and operational tooling. |
| New large-model pretraining project | Whichever completes a pilot fastest | Measure time to target loss, communication efficiency, checkpoint recovery, and engineering hours. |
| Uncertain export or import eligibility | Neither until verified | Resolve destination-specific rules, licensing, delivery, and service availability first. |
Bottom line
Ascend and Nvidia should be compared as complete, supported platforms. CSET’s 320 and 400 FP16 TFLOPS figures show how nominal Ascend specifications evolved, not how a production model will perform. The CSIS account of DeepSeek’s evaluation suggests a meaningful 910C inference gap to H100 and weaker training attractiveness at that time, but it is not a universal benchmark. CUDA’s mature ecosystem can make Nvidia the lower-risk option for existing software, while CANN-based Ascend systems may make sense when regional access, supply, or Huawei integration is decisive. The sound choice is the platform that meets your measured workload target, can be obtained and supported in your location, and reaches production within an acceptable engineering budget.
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